LAN7500 Datasheet, PDF (1/58 Pages) Microchip Technology – Hi-Speed USB 2.0 to 10/100/1000 Ethernet Controller

LAN7500/LAN7500i
Hi-Speed USB 2.0 to 10/100/1000 Ethernet Controller
PRODUCT FEATURES
Datasheet
Highlights
 Single Chip Hi-Speed USB 2.0 to 10/100/1000
Ethernet Controller
 10/100/1000 Ethernet MAC with Full-Duplex Support
 10/100/1000 Ethernet PHY with HP Auto-MDIX
 Integrated USB 2.0 Hi-Speed Device Controller
 Integrated USB 2.0 Hi-Speed PHY
 Implements Reduced Power Operating Modes
 Supports EEPROM-less Operation for Reduced BOM
 NetDetach provides automatic USB attach/detach
when Ethernet cable is connected/removed
Target Applications
 Embedded Systems / CE Devices
 Set-Top Boxes / PVR’s
 Networked Printers
 USB Port Replicators
 Standalone USB to Ethernet Dongles
 Test Instrumentation / Industrial
Key Benefits
 USB Device Controller
— Fully compliant with USB Specification Revision 2.0
— Supports HS (480 Mbps) and FS (12 Mbps) modes
— Four endpoints supported
— Supports vendor specific commands
— Integrated USB 2.0 PHY
— Remote wakeup supported
 High-Performance 10/100/1000 Ethernet Controller
— Fully compliant with IEEE802.3/802.3u/802.3ab
— Integrated Ethernet MAC and PHY
— 10BASE-T, 100BASE-TX, and 1000BASE-T support
— Full- and half-duplex capability (only full-duplex
operation at 1000Mbps)
— Full-duplex flow control
— Preamble generation and removal
— Automatic 32-bit CRC generation and checking
— 9 KB jumbo frame support
— Automatic payload padding and pad removal
— Loop-back modes
— Supports checksum offloads (IPv4, IPv6, TCP, UDP)
— Supports Microsoft NDIS 6.2 large send offload
— Supports IEEE 802.1q VLAN tagging
– Ability to add and strip IEEE 802.1q VLAN tags
– VLAN tag based packet filtering (all 4096 VIDs)
— Flexible address filtering modes
– 33 exact matches (unicast or multicast)
– 512-bit hash filter for multicast frames
– Pass all multicast
– Promiscuous unicast/multicast modes
– Inverse filtering
– Pass all incoming with status report
— Wakeup packet support
– Perfect DA frame, wakeup frame, magic packet,
broadcast frame, IPv6 & IPv4 TCP SYN
– 8 programmable 128-bit wakeup frame filters
— ARP and NS offload
— PME pin support
— Integrated Ethernet PHY
– Auto-negotiation
– Automatic polarity detection and correction
– HP Auto-MDIX support
– Link status change wake-up detection
— Support for 5 status LEDs
— Supports various statistical counters
 Power and I/Os
— Various low power modes
— 12 GPIOs
— Supports bus-powered and self-powered operation
— Variable voltage I/O supply (2.5V/3.3V)
 Miscellaneous Features
— EEPROM Controller
— IEEE 1149.1 (JTAG) Boundary Scan
— Requires single 25 MHz crystal
 Software
— Windows XP/ Vista / Windows 7 Driver
— Linux Driver
— Win CE Driver
— MAC OS Driver
— EEPROM/Manufacturing Utility for Windows/DOS
— PXE Support
— DOS ODI Driver
 Packaging
— 56-pin QFN (8x8 mm), RoHS compliant
 Environmental
— Commercial Temperature Range (0°C to +70°C)
— Industrial Temperature Range (-40°C to +85°C)
 2014 Microchip Technology Inc.
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