SX48BD Datasheet, PDF (1/58 Pages) List of Unclassifed Manufacturers – Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability, and On-Chip Debug

April, 2002
SX48BD/SX52BD
Configurable Communications Controllers with EE/Flash Program
Memory, In-System Programming Capability, and On-Chip Debug
1.0 PRODUCT OVERVIEW
1.1 Introduction
The Ubicom SX48BD/SX52BD are members of the SX
family of configurable communications controllers fabri-
cated in an advanced CMOS process technology. The
advanced process, combined with a RISC-based archi-
tecture, allows high-speed computation, flexible I/O con-
trol, and efficient data manipulation. Throughput is
enhanced by operating the device at frequencies up to 75
MHz and by optimizing the instruction set to include
mostly single-cycle instructions. In addition, the SX archi-
tecture is deterministic and totally reprogramable. The
unique combination of these characteristics enables the
device to implement hard real-time functions as software
modules (Virtual Peripheral™) to replace traditional hard-
ware functions.
On-chip functions include two 16-bit timers with 8-bit
prescalers supporting different operating modes (PWM,
simultaneous PWM/capture, and external event counter),
a general-purpose 8-bit timer with prescaler, an analog
comparator, a brown-out detector, a watchdog timer, a
power-save mode with multi-source wakeup capability,
an internal R/C oscillator, user-selectable clock modes,
and high-current outputs.
The SX48BD and SX52BD are functionally the same,
except for the package type and pinout. The SX48BD
has four fewer pins and has only four rather than eight
I/O pins for Port A.
OSC1 OSC2
WDT Clock
RTCC
OSC Driver
Clock
4MHz Internal
RC OSC
(divided by
8 steps)
Select
System Clock
Power-On
MCLR
Reset
RESET
Brown-Out
MIWU
Instruction ⁸
Pipeline
Fetch
Decode
Execute
Write Back
8
PC
8 Level
Stack
8-bit Watchdog
Timer (WDT)
8-bit Timer
RTCC
Interrupt
Stack
Prescaler for RTCC
or
Postscaler for WDT
Interrupt
System
Clock
Internal Data Bus
W
8
8
88
FSR
PC
STATUS
OPTION
8
Address
ALU
Data
262 Bytes
SRAM
Address 12
8
Port B
3
COMPARATOR
MIWU
8
4/8 8
8
8
Port A Port C Port D Port E
88
8
8
8
In-System
Debugging
In-System
Programming
4k Words
EEPROM
Port B
16-Bit
Timer 1
Port C
16-Bit
Timer 2
8-Bit
Prescaler
8-Bit
Prescaler
MODE
8 ^{Write Data}
8 Read Data
12 Instruction
IREAD
Figure 1-1. Block Diagram
Ubicom™ and the Ubicom logo are trademarks of Ubicom, Inc.
I²C™ is a trademark of Philips Corporation.
All other trademarks mentioned in this document are property of their respec-
tive companies.
© 2002 Ubicom, Inc. All rights reserved.
-1-
www.ubicom.com