U631H16 Datasheet, PDF (7/12 Pages) List of Unclassifed Manufacturers – SOFTSTORE 2K X 8 NVSRAM

NONVOLATILE MEMORY OPERATIONS
No.
STORE CYCLE INHIBIT and
AUTOMATIC POWER UP RECALL
24 Power Up RECALL Duration^{k, e}
Low Voltage Trigger Level
k: t_RESTORE starts from the time V_CC rises above V_SWITCH.
Symbol
Alt.
t_RESTORE
V_SWITCH
IEC
U631H16
Min.
Max.
Unit
650
µs
4.0
4.5
V
STORE CYCLE INHIBIT and AUTOMATIC POWER UP RECALL
V_CC
5.0 V
V_SWITCH
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
Power Up
RECALL
24
t_RESTORE
t
STORE inhibit
SOFTWARE MODE SELECTION
E
W
A10 - A0
(hex)
Mode
I/O
L
H
L
H
000
Read SRAM
Output Data
555
Read SRAM
Output Data
2AA
Read SRAM
Output Data
7FF
Read SRAM
Output Data
0F0
Read SRAM
Output Data
70F
Nonvolatile STORE
Output High Z
000
Read SRAM
Output Data
555
Read SRAM
Output Data
2AA
Read SRAM
Output Data
7FF
Read SRAM
Output Data
0F0
Read SRAM
Output Data
70E
Nonvolatile RECALL
Output High Z
Power
Active
I_CC2
Active
Notes
l, m
l, m
l, m
l, m
l, m
l
l, m
l, m
l, m
l, m
l, m
l
l: The six consecutive addresses must be in order listed (000, 555, 2AA, 7FF, 0F0, 70F) for a Store cycle or (000, 555, 2AA,
7FF, 0F0, 70E) for a RECALL cycle. W must be high during all six consecutive cycles. See STORE cycle and RECALL cycle tables and
diagrams for further details.
The following six-address sequence is used for testing purposes and should not be used: 000, 555, 2AA, 7FF, 0F0, 39C.
m: I/O state assumes that G ≤ V_IL. Activation of nonvolatile cycles does not depend on the state of G.
December 12, 1997
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