Z8ICE001ZEM Datasheet, PDF (6/7 Pages) Zilog, Inc. – Z8PLUS EMULATOR

Z8ICE001ZEM
Z8Plus Emulator
ZiLOG
LIMITATIONS
1. Although GUI 3.00 and later support baud rates up to
57.6 K baud, the actual maximum usable rate may be
less due to limitations of the user’s hardware or
systems software setup. The maximum usable rate is
determined by the user’s tolerance of the frequency of
communication errors.
2. Clicking on the HALT button does not always halt the
ICEBOX execution. If the application goes into STOP
or HALT mode, the only way to halt the emulator
execution is by executing a Stop-Mode Recovery (as
defined by the user program). The user may also reset
the application using the emulator MASTER RESET
button; however, doing so resets the entire ICEBOX.
3. RC oscillator emulation is not supported.
Z8E000/Z8E001
1. Analog Comparator Power-Up Glitch—The Z8E00X
family of devices powers the analog comparators off
while not in use. When the comparator is enabled, it
tends to exhibit glitches on the output until it
stabilizes. This condition can cause spurious interrupts
if the interrupts are enabled during this interval. If a
single command is used to enable the comparator and
the PB4 interrupts, the interrupt logic registers the
glitches. The IREQ bits for both the rising and falling
edges are set. If the IMASK register is configured to
allow these interrupts, the device immediately jumps
to the interrupt code. To avoid problems and
undesirable results, it is recommended that the user
observe the following precautions when enabling the
comparator.
a. The global interrupts should be disabled with the
DI command, or the PB4 interrupts should be
masked whenever switching from digital-to-
analog or analog-to-digital mode.
b. The IREQ bits for PB4 (bits 1 and 4) should be
cleared after the mode change is complete.
c. Finally, the interrupts may be reenabled. This
issue is due to an inherent design limitation which
affects both the Z8E00X and the emulator.
2. WDT in HALT mode—The Z8M001 ICEchip has a
bug that causes the watchdog timer to continue to run
in HALT mode, even if the WDT in HALT bit
(TCTLHI.7) is cleared. Work around this bug by
emulating the code with the WDT stopped and then
enabling the watchdog just before programming an
OTP device. The Z8E00X devices are not affected by
this problem. It is an emulation-only limitation.
3. The RC OSCILLATOR option bit is not available for
the Z8E000 and Z8E001 devices.
4. Select the EPROM PROTECT/TEST MODE KILL
option bit, only after programming the device and
verifying the code. From that point, select the EPROM
PROTECT option and program again. Finally, run
VERIFY one last time (this run should FAIL) to ensure
that the code is truly protected.
5. The ZDS command VECTOR RESET adds a jump at
address 20h. This command prevents the user from
writing to the TCTLHI register to configure the WDT.
This command should not be used for Z8Plus parts.
6. The WDT and SMR functions of the emulator are
tailored to match Z8PE00X devices. These functions
do not perform exactly the same as for Z8E00X
devices. Specifically, the SMR is edge-triggered, not
level-triggered. On Z8E00X devices, operation does
not resume until the pin is released. The WDT of the
emulator, like the Z8PE00X devices themselves,
counts up, not down, as on Z8E00X devices.
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DS008801-Z8X1299