Z86L7103ZEM Datasheet, PDF (6/7 Pages) Zilog, Inc. – ICEBOX FAMILY IN-CIRCUIT EMULATOR-L71

In-Circuit Emulator-L71
0 = Digital Mode
1 = Analog Mode
23. For SMR2 Recovery Source to work correctly, Port 2
must be configured to input. (P2M Register must be
written.)
24. There is no software option for the Port 3 pull-up
resistor for all OTP devices when using the L71
ICEBOX.
Z86L70/L71/L75
1. The register %F8(P01M register) bit D2 must be set to
state “1.
2. WDT Register(F)%0F can only be written in the first 64
internal system clocks from the start of program
execution.
3. The PCON register reserved bits for the L71 emulator
must be set to “1”.
4. The L71 emulator does not correctly emulate L71
ports P34 and P35 when open-drain. The C50 ICE
Chip does not exhibit the same behavior when the
P3M Control Register is programmed.
Z86L72/L73/E72/E73
1. WDT Register(F)%0F can only be written in the first 64
internal system clocks from the start of program
execution.
2. Register(F)%00 PCON has D2 controlling the open-
drain for Port 0 and D1 controlling the open-drain for
Port 1.
3. The device has 256 bytes of internal register and 512
bytes of internal data memory (%FE00 to %FFFF).
The emulator has 256 bytes of internal register and
512 bytes of internal data memory (%FE00 to
%FFFF). The E72/E73 OTP has 768 bytes of internal
DATA Memory (%FD00 -%FFFF).
Zilog
Z86L79/L80/L8/L81/L86
1. The register %F8(P01M register) bit D2 must be set to
state “1”.
2. WDT Register(F)%0F can only be written in the first 64
internal system clocks from the start of program
execution.
Z86L71
1. When the emulator is set up to allow the analog
comparators to output their value on P34, and one
writes to Port 0, P34 stops following the comparator
input.
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CP97LVO2100