Z8FS040 Datasheet, PDF (39/56 Pages) Zilog, Inc. – ZMOTION Detection and Control Family Featuring Zilog’s PIR Technology

ZMOTION^TM Detection and Control Family
Product Specification
Medium
1Dh
12h
Large
46h
2D
PIR Signal (ePIR_Signal)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field
PIR Signal
Control
Read
Address
FAH
FBH
PIR Signal (Bits 0-15)
Controlled by PIR engine
These registers contain the last PIR signal obtained by the engine. Each time the engine generates a
new PIR signal sample it will place it in these registers and set the New Sample bit in the PIR Advanced
Status/Control 0 Register. This gives the application direct visibility to the PIR generated signal for
debugging purposes.
Note: The 16 bit value provided by these two 8 bit registers must be read as an atomic operation by the
application. This can be ensured by either using the CPU’s ATM instruction or by disabling interrupts
while reading the two 8 bit registers.
PIR DC Signal Level (ePIR_Signal_DC)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field
PIR Signal DC
Control
Address
FCH
Read
FDH
PIR Signal DC Level (Bits 0-15)
Controlled by PIR engine
These registers contain the last PIR signal DC Level calculated by the engine. Each time the engine
generates new control limits it will place the DC component level in these registers.
Note: The 16 bit value provided by these two 8 bit registers must be read as an atomic operation by the
application. This can be ensured by either using the CPU’s ATM instruction or by disabling interrupts
while reading the two 8 bit registers.
PS028506-1110
PRELIMINARY
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