ZLP12840OPTMCU Datasheet, PDF (36/158 Pages) Zilog, Inc. – Crimzon-TM Infrared Microcontrollers ZLP12840 OTP MCU with Learning Amplification

ZLP12840 OTP MCU
Product Specification
25
Port 3 Mode Register
The Port 3 Mode Register is used primarily to configure the functionality of the Port 3
inputs. When bit 2 is set, the IR Learning Amplifier is used instead of the COMP1 com-
parator, regardless of the value of bit 1. See Table 14.
Table 14. Port 3 Mode Register (P3M)
Bit
7
6
5
4
3
2
1
Field
Reserved
IR Learning
Amplifier
Digital/Analog
Mode
Reset
X
X
X
X
X
0
0
R/W
—————
W
W
Address
Bank Independent: F7h; Linear 0F7h
0
Port 2 Open-
Drain
0
W
Bit
Position
[7:3]
[2]
[1]
[0]
R/W
—
W
W
W
Value Description
— Reserved—Writes have no effect. Reads return 11111b.
0 IR Learning Amplifier disabled.
1 IR Learning Amplifier enabled with P31 configured as amplifier input.
Digital/Analog Mode
0 P30, P31, P32, P33 are digital inputs.
1 P30, P32, and P33 are comparator inputs. If P3M[2]=0, P31 is also a
comparator input. If P3M[2]=1, P31 is the IR amplifier input.
0 Port 2 open-drain.
1 Port 2 push/pull.
Note: This register is not reset after a stop-mode recovery.
PS024406-0106
PRELIMINARY
Port 3 Mode Register