Z86318 Datasheet, PDF (20/26 Pages) Zilog, Inc. – Z8 MCU 8-BIT MICROCONTROLLER

Z86318
Z8^® MCU 8-Bit Microcontroller
FUNCTIONAL DESCRIPTION (Continued)
XTAL1
C1
C1
XTAL2
C2
C2
XTAL1
L
XTAL2
XTAL1
XTAL2
Ceramic
Resonator
or Crystal
LC Clock
External Clock
Figure 17. Oscillator Configuration
HALT Mode. This instruction turns off the internal CPU
clock but not the on-chip oscillation circuit. The
counter/timers and external interrupts IRQ1 and IRQ2 re-
main active. The device can be recovered by interrupts, ei-
ther externally or internally generated. An interrupt request
must be executed (enabled) to exit HALT mode. After the
interrupt service routine, the program continues from the
instruction after the HALT. The HALT mode may also be
exited via POR/RESET activation or a WDT time-out. In
this case, the program execution begins at location
000CH. The WDH instruction is used to enable the Watch-
Dog Timer in HALT mode.
STOP Mode. This instruction turns off the internal clock
and reduces the standby current. The STOP mode can be
released by the following methods: 1) Power-On Reset
(POR) and 2) P27 is configured as an input line when the
device executes the STOP instruction. A low input condi-
tion on P27 that meets a minimum pulse width (TWSM) re-
leases the STOP mode. Note: WDT is disabled in STOP
mode.
Upon reset, program execution begins at location 000C
(hex). However, when P27 is used to release the STOP
mode, the I/O port mode registers are not reconfigured to
their default power-on conditions. This prevents any I/O,
configured as an output when the STOP instruction was
executed, from glitching to an unknown state. To use the
P27 release approach with STOP mode, use the following
instruction:
LDP2M, #1XXX XXXXB(X = user's choice)
NOP
STOP
In order to enter STOP (or HALT) mode, it is necessary to
first flush the instruction pipeline to avoid suspending exe-
cution in mid-instruction. To do this, the user must execute
a NOP (opcode=FFH) immediately before the appropriate
sleep instruction, such as the following:
FF
NOP
; clear the pipeline
6F
STOP
; enter the STOP
mode
or
FF
NOP
; clear the pipeline
7F
HALT
; enter the HALT
mode
In STOP or HALT mode, the value of each output line prior
to the HALT or STOP instruction is retained during execu-
tion.
20
PRELIMINARY