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Z86C33 Datasheet, PDF (14/16 Pages) Zilog, Inc. – CMOS Z8 CONSUMER CONTROLLER PROCESSOR
AC ELECTRICAL CHARACTERISTICS
Additional Timing Table (Divide-By-One Mode, SCLK/TCLK = XTAL)
No Symbol
1 TpC
2 TrC,TfC
3 TwC
4 TwTinL
5 TwTinH
6 TpTin
7 TrTin,
TfTin
8A TwIL
8B TwIL
9 TwIH
10 Twsm
11 Tost
Parameter
T
A
=
0°C
to
+70°C
T
A
=
40°C
to
+105°C
VCC
4 MHz
4 MHz
Note [6]
Min Max Min Max
Input Clock Period
3.0V
5.5V
Clock Input Rise & Fall Times 3.0V
5.5V
250 DC
250 DC
25
25
250 DC
250 DC
25
25
Input Clock Width
3.0V
125
125
5.5V
125
125
Timer Input Low Width
3.0V
100
100
5.5V
70
70
Timer Input High Width
3.0V
3TpC
3TpC
5.5V
3TpC
3TpC
Timer Input Period
3.0V
4TpC
4TpC
5.5V
4TpC
4TpC
Timer Input Rise & Fall Timer 3.0V
5.5V
Int. Request Low Time
3.0V
5.5V
100
100
100
70
100
100
100
70
Int. Request Low Time
3.0V
3TpC
3TpC
5.5V
3TpC
3TpC
Int. Request Input High Time 3.0V
3TpC
3TpC
5.5V
3TpC
2TpC
STOP Mode Recovery Width Spec 3.0V
5.5V
Oscillator Startup Time
3.0V
5.5V
12
12
5TpC
5TpC
12
12
5TpC
5TpC
Notes:
[1] Timing Reference uses 0.7 VCC for a logic 1 and 0.2 VCC for a logic 0.
[2] Interrupt request via Port 3 (P31-P33).
[3] Interrupt request via Port 3 (P30).
[4] SMR-D5 = 1, POR STOP Mode Delay is on.
[5] Reg. WDTMR.
[6] The VCC voltage specification of 3.0V guarantees 3.3V ± 0.3V, and
the VDD voltage specification of 5.5V guarantees 5.0V ± 0.5V.
[7] SMR D1 = 0.
[8] Maximum frequency for internal system clock is 4 MHz when
using XTAL divide-by-one mode.
[9] For RC and LC oscillator, and for oscillator driven by clock driver.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Z86C33/C43
CP95DZ80202
Notes
[1,7,8]
[1,7,8]
[1,7,8]
[1,7,8]
[1,7,8]
[1,7,8]
[1,7,8]
[1,7,8]
[1,7,8]
[1,7,8]
[1,7,8]
[1,7,8]
[1,7,8]
[1,7,8]
[1,2,7,8]
[1,2,7,8]
[1,3,7,8]
[1,3,7,8]
[1,2,7,8]
[1,2,7,8]
[4,8]
[4,8]
[4,8,9]
[4,8,9]
14