Z89C00 Datasheet, PDF (1/28 Pages) Zilog, Inc. – 16-BIT DIGITAL SIGNAL PROCESSOR

ZILOG
PRELIMINARY
Z89C00
16-BIT DIGITAL SIGNAL PROCESSOR
PRELIMINARY PRODUCT SPECIFICATION
FEATURES
s 16-Bit Single Cycle Instructions
s Zero Overhead Hardware Looping
s 16-Bit Data
s Ready Control for Slow Peripherals
s Single Cycle Multiply/Accumulate (100 ns)
s Six-Level Stack
s 512 Words of On-Chip RAM
s Static Single-Cycle Operation
Z89C00
16-BIT DIGITAL
SIGNAL PROCESSOR
s 16-Bit I/O Port
s 4K Words of On-Chip Masked ROM
s Three Vectored Interrupts
s 64K Words of External Program Address Space
s Two Conditional Branch Inputs/Two User Outputs
s 24-Bit ALU, Accumulator and Shifter
s IBM^® PC Development Tools
GENERAL DESCRIPTION
The Z89C00 is a second generation, 16-bit, fractional,
two’s complement CMOS Digital Signal Processor (DSP).
Most instructions, including multiply and accumulate,
are accomplished in a single clock cycle. The processor
contains 1 Kbyte of on-chip data RAM (two blocks of
256 16-bit words), 4K words of program ROM and 64K
words of program memory addressing capability. Also,
the processor features a 24-bit ALU, a 16 x 16 multiplier, a
24-bit Accumulator and a shifter. Additionally, the processor
contains a six-level stack, three vectored interrupts and
two inputs for conditional program jumps. Each RAM block
contains a set of three pointers which may be incremented
or decremented automatically to affect hardware looping
without software overhead. The data RAMs can be
simultaneously addressed and loaded to the multiplier for
a true single cycle multiply.
There is a 16-bit address and a 16-bit data bus for external
program memory and data, and a 16-bit I/O bus for
transferring data. Additionally, there are two general
purpose user inputs and two user outputs. Operation with
slow peripherals is accomplished with a ready input pin.
The clock may be stopped to conserve power.
Development tools for the IBM PC include a relocatable
assembler, a linker loader, and an ANSI-C compiler. Also,
the development tools include a simulator/debugger, a
cross assembler for the TMS320 family assembly code
and a hardware emulator.
To assist the user in understanding the Z89C00 DSP Q15
two's complement fractional multiplication, an application
note has been included in this product specification as an
appendix.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.,
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Circuit
Device
Power
V_CC
V_DD
Ground
GND
V_SS
DC 4083-00
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