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Z8932120PSC Datasheet, PDF (1/40 Pages) Zilog, Inc. – 16-BIT DIGITAL SIGNAL PROCESSORS
PRELIMINARY PRODUCT SPECIFICATION
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Z89321/371/391
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16-BIT DIGITAL SIGNAL PROCESSORS
FEATURES
DSP ROM
Device
(KW)
Z89321
4
Z89371
Z89391
64*
Note: *External
OTP
(KW)
4
DSP RAM
Lines
512
512
512
MIPS
(Max)
24
16
24
s 0°C to +70°C Standard Temperature Range
-40°C to +85°C Extended Temperature Range
s 4.5- to 5.5-Volt Operating Range
DSP Core
s 24 MIPS @ 24 MHz Maximum, 16-Bit Fixed Point DSP
s 41.7 ns Minimum Instruction Cycle Time
s Six-Level Hardware Stack
s Six Register Address Pointers
s Optimized Instruction Set (30 Instructions)
Device
40-Pin 44-Pin
DIP
PLCC
Z89321
X
X
Z89371
X
X
Z89391
Note: *General-Purpose
44-Pin
QFP
X
X
84-Pin
PLCC
X
On-Board Peripherals
s Dual 8/16-Bit CODEC Interface Capable of up to
10 Mbps
s m-Law Compression Option
(Decompression is Performed in Software)
s 16-Bit I/O Bus (Tri-Stated)
s Three I/O Address Pins (Latched Outputs)
s Wait-State Generator
s Three Vectored Interrupts
s 13-Bit General-Purpose Timer
GENERAL DESCRIPTION
The Z893XX products are high-performance Digital Signal
Processors (DSPs) with a modified Harvard-type architec-
ture featuring separate program and data memory. The de-
sign has been optimized for processing power while mini-
mizing silicon space.
The single-cycle instruction execution and bus structure
promotes efficient algorithm execution, while the six regis-
ter pointers provide circular buffering capabilities and dual
operand fetching.
Three vectored interrupts are complemented by a six-level
stack, and the CODEC interface allows high-speed trans-
fer rates to accommodate digital audio and voice data.
A dedicated Counter/Timer provides the necessary timing
signals for the CODEC interface, and an additional 13-bit
timer is available for general-purpose use.
DS97DSP0100
PRELIMINARY
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