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Z86E64 Datasheet, PDF (1/12 Pages) Zilog, Inc. – CMOS Z8 OTP Microcontroller
PRELIMINARY CUSTOMER PROCUREMENT SPECIFICATION
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Z86E64
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CMOS Z8 OTP MICROCONTROLLER
FEATURES
Device
ROM
(KB)
RAM*
(Bytes)
Z86E64
32
236
Note: *General-Purpose
I/O
Lines
52
Voltage
Range
4.5-5V
s Low-Power Consumption: 200 mW (max)
s Fast Instruction Pointer: 0.75 µs @ 16 MHz
s Two Standby Modes: STOP and HALT
s Full-Duplex UART
s All Digital Inputs are TTL Levels
s Auto Latches
s RAM and ROM Protect
s Two Programmable 8-Bit Counter/Timers,
Each with 6-Bit Programmable Prescaler
s Six Vectored, Priority Interrupts from Eight Different
Sources
s Low EMI Mode Option
s 68-Pin Leaded Chip-Carrier
GENERAL DESCRIPTION
The Z86E64 is a member of the Z8 single-chip microcon-
troller family. The Z86E64 can address both external mem-
ory and pre-programmed ROM, which enables this Z8
MCUTM to be used in high-volume applications where
code flexibility is required.
The Z86E64 is a pin compatible, One-Time-Programmable
(OTP) version of the Z86C64. The Z86E64 contains 32 KB
of EPROM memory in place of the 32 KB of ROM on the
Z86C64.
There are three basic address spaces available to support
this wide range of configuration: Program Memory, Data
Memory, and 236 general-purpose registers.
The Z86E64 offers a flexible I/O scheme, an efficient reg-
ister and address space structure, multiplexed capabilities
between address/data, I/O, and a number of ancillary fea-
tures that are useful in many industrial and advanced sci-
entific applications.
For applications demanding powerful I/O capabilities, the
Z86E64’s dedicated input and output lines are grouped
into six ports. Each port consists of eight lines, except port
6, which has four lines. Each port is configurable under
software control to provide timing, status signals, serial or
parallel I/O with or without handshake, and an address/da-
ta bus for interfacing external memory.
The Z86E64 offers two on-chip counter/timers with a large
number of user-selectable modes, and an Universal Asyn-
chronous Receiver/Transmitter (UART). See figure 1 for-
Functional Block description.
Note: All Signals with a preceding front slash, "/", are ac-
tive Low, for example: B//W (WORD is active Low); /B/W
(BYTE is active Low, only). Power connections follow con-
ventional descriptions below:
Connection
Power
Ground
Circuit
VCC
GND
Device
VDD
VSS
CP96DZ83200 (10/96)
PRELIMINARY
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