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ZVN4424Z Datasheet, PDF (2/4 Pages) Zetex Semiconductors – N-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET
ZVN4424Z
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN. TYP MAX. UNIT CONDITIONS.
Drain-Source Breakdown BVDSS 240
Voltage
V
ID=1mA, VGS=0V
Gate-Source Threshold
Voltage
VGS(th)
0.8 1.3 1.8 V
ID=1mA, VDS= VGS
Gate-Body Leakage
IGSS
100 nA VGS=± 40V, VDS=0V
On State Drain-Current
ID(on)
0.8 1.4
A
VDS=10V, VGS=10V
Zero Gate Voltage Drain
IDSS
Current
10 µA
100 µA
VDS=240 V, VGS=0V
VDS=190 V, VGS=0V, T=125°C
Static Drain-Source
On-State Resistance
RDS(on)
4
5.5 Ω
4.3 6
Ω
VGS=10V,ID=500mA*
VGS=2.5V,ID=100mA*
Forward
gfs
Transconductance (1) (2)
0.4 0.75
S
VDS=10V,ID=0.5A
Input Capacitance (2)
Ciss
Common Source Output Coss
Capacitance (2)
110 200 pF
15 25 pF
VDS=25V, VGS=0V, f=1MHz
Reverse Transfer
Crss
Capacitance (2)
3.5 15 pF
Turn-On Delay Time (2)(3) td(on)
2.5 5
ns
Rise Time (2)(3)
Turn-Off Delay Time (2)(3)
tr
td(off)
5
8
ns
VDD ≈50V, ID =0.25A, VGEN=10V
40 60 ns
Fall Time (2)(3)
tf
16 25 ns
(1) Measured under pulsed conditions. Width=300µs. Duty cycle ≤2%
(2) Sample test.
(3) Switching times measured with 50Ω source impedance and <5ns rise time on a pulse generator
Spice parameter data is available upon request for this device
TYPICAL CHARACTERISTICS
1
0.1
0.01
DC
1s
100ms
10ms
1ms
100µs
0.001
1
10
100
1k
VDS - Drain Source Voltage (V)
Safe Operating Area