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ZVP2120G Datasheet, PDF (1/3 Pages) Zetex Semiconductors – P-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET
SOT223 P-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 3 - OCTOBER 1995 7
FEATURES
* 200 Volt VDS
* RDS(on)=25Ω
ZVP2120G
D
PARTMARKING DETAIL – ZVP2120
COMPLEMENTARY TYPE – ZVN2120G
S
D
G
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
SYMBOL
VALUE
UNIT
Drain-Source Voltage
VDS
-200
V
Continuous Drain Current at Tamb=25°C
ID
-200
mA
Pulsed Drain Current
IDM
-1.2
A
Gate Source Voltage
VGS
± 20
V
Power Dissipation at Tamb=25°C
Ptot
2
W
Operating and Storage Temperature Range Tj:Tstg
-55 to +150
°C
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN. MAX. UNIT CONDITIONS.
Drain-Source
Breakdown Voltage
BVDSS -200
V
ID=-1mA, VGS=0V
Gate-Source Threshold
Voltage
VGS(th) -1.5 -3.5 V
ID=-1mA, VDS= VGS
Gate-Body Leakage
IGSS
Zero Gate Voltage Drain
IDSS
Current
-20 nA
-10 µA
-100 µA
VGS=± 20V, VDS=0V
VDS=-200 V, VGS=0
VDS=-160 V, VGS=0V, T=125°C
(2)
On-State Drain Current(1)
Static Drain-Source On-State
Resistance (1)
ID(on)
RDS(on)
-300
25
mA VDS=-25 V, VGS=-10V
Ω
VGS=-10V, ID=-150mA
Forward Transconductance gfs
50
(1)(2)
mS VDS=-25V, ID=-150mA
Input Capacitance (2)
Ciss
Common Source Output
Coss
Capacitance (2)
100 pF
25 pF
VDS=-25V, VGS=0V, f=1MHz
Reverse Transfer Capacitance (2)
Turn-On Delay Time (2)(3)
Rise Time (2)(3)
Turn-Off Delay Time (2)(3)
Fall Time (2)(3)
Crss
td(on)
tr
td(off)
tf
7
pF
7
ns
15
ns
VDD≈-25V, ID=-150mA
12 ns
15 ns
(1) Measured under pulsed conditions. Width=300µs. Duty cycle ≤2% (2) Sample test.
(3) Switching times measured with 50Ω source impedance and <5ns rise time on a pulse generator
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