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VN2222LL Datasheet, PDF (1/1 Pages) Motorola, Inc – TMOS FET Transistor
N-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 2 – FEB 94
VN2222LL
S
G
D
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
Drain-Source Voltage
Continuous Drain Current at Tamb = 25°C
Pulsed Drain Current
Gate Source Voltage
Power Dissipation at Tamb = 25°C
Operating and Storage Temperature Range
SYMBOL
VDS
ID
IDM
VGS
Ptot
Tj:Tstg
TO92
VALUE
60
150
1
± 40
400
-55 to +150
UNIT
V
mA
A
V
mW
°C
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN.
MAX. UNIT CONDITIONS.
Drain-Source
Breakdown Voltage
BVDSS
60
V
ID=100µA, VGS=0V
Gate-Source Breakdown VGS(th)
0.6
2.5
V
Voltage
ID=1mA, VDS= VGS
Gate Body Leakage
IGSS
Zero Gate Voltage Drain IDSS
Current (1)
On State Drain Current(1) ID(on)
750
Static Drain Source On
State Voltage (1)
VDS(on)
Static Drain Source On
State Resistance (1)
RDS(on)
100
nA
10
µA
500
µA
mA
3.75
V
1.50
V
7.5
Ω
VGS=± 30V, VDS=0V
VDS=48 V, VGS=0V
VDS=48 V, VGS=0V, T=125°C
VDS=10 V, VGS=10V
VGS=10V,ID=500mA
VGS=5V, ID=200mA
VGS=10V,ID=500mA
Forward
gfs
100
Transconductance (1)(2)
mS
VDS=10V,ID=500mA
Input Capacitance (2)
Ciss
Common Source Output Coss
Capacitance (2)
60
pF
25
pF
VDS=25 V, VGS=0V
f=1MHz
Reverse Transfer
Crss
Capacitance (2)
5
pF
Turn-On Time (2)(3)
t(on)
10
ns
VDD ≈15V, ID=600mA
Turn-Off Time (2)(3)
t(off)
10
ns
(1) Measured under pulsed conditions. Width=300µs. Duty cycle ≤2%, (2) Sample test.
(3) Switching times measured with 50Ω source impedance and <5ns rise time on a pulse generator
3-91