BST82 Datasheet, PDF (1/1 Pages) NXP Semiconductors – N-channel enhancement mode vertical D-MOS transistor

SOT23 N CHANNEL ENHANCEMENT
M_I ODE VERTICAL DMOS FET
IIssue _{2 - October 1997}
PARTMARKING DETAIL – O2
BST82
E
C
B
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
Drain Source Voltage
Drain Source Voltage
(non repetitive peak tp ≤ 2ms)
Continuous Drain Current at T_amb=25°C
Drain Current Peak
Gate-Source Voltage
Max Power Dissipation at T_amb=25°C
Operating and Storage Temperature Range
SYMBOL
V_DS
V_DS(sm)
I_D
I_DM
V_GS
P_D
T_j:T_stg
SOT23
VALUE
80
100
175
600
± 20
300
-55 to +150
UNIT
V
V
mA
mA
V
mW
°C
ELECTRIAL CHARACTERISTICS (at T_amb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN. TYP. MAX. UNIT CONDITIONS.
Drain Source
B_VDSS
80
Breakdown Voltage
V
I_C=100µA
Gate Source
V_GS(th)
1.5
Threshold Voltage
3.5
V
I_D=1mA, V_DS=V_GS
Gate Body Leakage
Emitter Cut-Off
Current
I_GSS
I_DSS
100 nA
1
µA
VGS=20V
V_DS=60V
Static Drain-Source
On-state Resistance
R_DS(on)
7
10
Ω
I_D=150mA, V_GS=5V
Transfer Admittance | yfs |
Input Capacitance (2) C_iss
Common Source
C_oss
Output Capacitance (2)
Reverse Transfer
C_rss
Capacitance (2)
150
15
30
13
20
3
6
mS
I_D=175mA, V_DS=5V
pF
pF
V_DS=10V, V_GS=0V
f=1MHz
pF
Switching Times
T_on
T_off
4
10
ns
I_D=175mA, V_DD=50V
4
10
ns
V_GS=0 to 10V
(1) Swithcing times measured at 150Ω source impedance and <5ns rise time on a pulse generator
(2) Sample test
*Measured under pulsed conditions. Pulse width=300µs. Duty cycle ≤ 2%