PSA3330A Datasheet, PDF (1/2 Pages) Z-Communications, Inc – LOW COST - HIGH PERFORMANCE PHASE LOCKED LOOP

9939 Via Pasar • San Diego, CA 92126
TEL [phone] FAX [phone]
PSA3330A
PHASE LOCKED LOOP
Rev A1
PHASE NOISE (1 Hz BW, typical)
-50
-60
-70
-80
-90
-100
FEATURES
• Frequency Range: 3305 ^- 3335 _MHz
• Step Size:
125 _KHz
• PLL-24 - Style Package
APPLICATIONS
• Telecommunications
• Satellite
• Telemetry
-110
-120
-130
-140
-150
1000
10000
100000
1000000
PERFORMANCE SPECIFICATIONS
Frequency Range
Phase Noise @ 10 kHz offset (1 Hz BW, typ.)
Harmonic Suppression (2nd, typ.)
Sideband Spurs (typ.)
Power Output
VALUE
3305 - 3335
-95
-15
-70
-1±3
UNITS
MHz
dBc/Hz
dBc
dBc
dBm
Load Impedance
Step Size
Charge Pump Output Current
Switching Speed (typ., adjacent channel)
Startup Lock Time (typ.)
Operating Temperature Range
Package Style
50
125
5000
1
1
-40 to 85
PLL-24
Ω
KHz
µΑ
mSec
mSec
°C
POWER SUPPLY REQUIREMENTS
Supply Voltage (Vcc, nom.)
5
Supply Current (Icc, typ.)
50
All specifications are typical unless otherwise noted and subject to change without notice.
Vdc
mA
APPLICATION NOTES
• AN-107 : How to Solder Z-COMM VCOs / PLLs
• AN-200 : Mounting and Grounding of Z-COMM PLLs
• AN-201 : PLL Fundamentals
AN-202 : PLL Functional Description
NOTES:
Reference Oscillator Signal: 5 MHz<f _osc<100 MHz
Frequency Synthesizer: Analog Devices - ADF4106
Prescaler: 32
© Z-Communications, Inc.
Page 1
All rights reserved