PSA3230C Datasheet, PDF (1/2 Pages) Z-Communications, Inc – LOW COST - HIGH PERFORMANCE PHASE LOCKED LOOP

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PSA3230C
PHASE LOCKED LOOP
Rev A1
PHASE NOISE (1 Hz BW, typical)
-60
-70
-80
-90
-100
FEATURES
• Frequency Range: 3205 ^- 3235 _MHz
• Step Size:
125 _KHz
• _PLL-24H - Style Package
APPLICATIONS
• Digital Radio Equipment
• Fixed Wireless Access
• Satellite Communication Systems
-110
-120
-130
-140
-150
1 E+3
10 E+3
100 E+3
1 E+6
PERFORMANCE SPECIFICATIONS
Frequency Range
Phase Noise @ 10 kHz offset (1 Hz BW, typ.)
Harmonic Suppression (2nd, typ.)
Sideband Spurs (typ.)
Power Output
VALUE
3205 - 3235
-107
-12
-70
0±3
UNITS
MHz
dBc/Hz
dBc
dBc
dBm
Load Impedance
Step Size
Charge Pump Output Current
Switching Speed (typ., adjacent channel)
Startup Lock Time (typ.)
Operating Temperature Range
50
125
5000
3
1
-40 to 85
Ω
KHz
µΑ
mSec
mSec
°C
Package Style
PLL-24H
POWER SUPPLY REQUIREMENTS
Supply Voltage (Vcc, nom.)
5
Supply Current (Icc, typ.)
35
All specifications are typical unless otherwise noted and subject to change without notice.
Vdc
mA
APPLICATION NOTES
• AN-107 : How to Solder Z-COMM VCOs / PLLs
• AN-200 : Mounting and Grounding of Z-COMM PLLs
• AN-201 : PLL Fundamentals
AN-202 : PLL Functional Description
NOTES:
Reference Oscillator Signal: 5 MHz<f _osc<100 MHz
Frequency Synthesizer: Analog Devices - ADF4106
Prescaler: 32
© Z-Communications, Inc.
Page 1
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