PSA1650A_10 Datasheet, PDF (1/2 Pages) Z-Communications, Inc – PHASE LOCKED LOOP

14118 Stowe Drive, Suite B | Poway, CA 92064
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PSA1650A
PHASE LOCKED LOOP
Rev A1
PHASE NOISE (1 Hz BW, typical)
-70
-80
-90
-100
FEATURES
• Frequency Range: 1600 - _{1700 MHz}
• Step Size:
1000 _KHz
• _PLL-24 - Style Package
APPLICATIONS
• Telecommunications
• Satellite
• ^Telemetry
-110
-120
-130
-140
-150
100
1000
10000
PERFORMANCE SPECIFICATIONS
Frequency Range
Phase Noise @ 10 kHz offset (1 Hz BW, typ.)
Harmonic Suppression (2nd, typ.)
Sideband Spurs (typ.)
Power Output
Load Impedance
Step Size
Charge Pump Output Current
Switching Speed (typ., adjacent channel)
Startup Lock Time (typ.)
Operating Temperature Range
VALUE
1600 - 1700
-98
-15
-65
1.25±2.25
50
1000
1250
2
2
-40 to 85
Package Style
PLL-24
POWER SUPPLY REQUIREMENTS
Supply Voltage (Vcc, nom.)
5
Supply Current (Icc, typ.)
35
All specifications are typical unless otherwise noted and subject to change without notice.
100000
1000000
UNITS
MHz
dBc/Hz
dBc
dBc
dBm
kHz
mSec
mSec
°C
Vdc
mA
APPLICATION NOTES
• AN-107 : How to Solder Z-COMM VCOs / PLLs
• AN-202 : PLL Functional Description
NOTES:
Reference Oscillator Signal: 5 MHz< <100 MHz
Frequency Synthesizer: Analog Devices - ADF4106
© Z-Communications, Inc.
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