PSA0951A Datasheet, PDF (1/2 Pages) Z-Communications, Inc – LOW COST - HIGH ERFORMANCE PHASE LOCKED LOOP

9939 Via Pasar • San Diego, CA 92126
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PSA0951A
PHASE LOCKED LOOP
Rev A1
PHASE NOISE (1 Hz BW, typical)
-70
-90
-110
FEATURES
• Frequency Range: 950 ^- 956 _MHz
• Step Size:
50 _KHz
• _PLL-24 - Style Package
APPLICATIONS
• Basestations
• Satellite Communications
• Mobile Radios
-130
-150
-170
1 E+3
10 E+3
100 E+3
1 E+6
PERFORMANCE SPECIFICATIONS
Frequency Range
Phase Noise @ 10 kHz offset (1 Hz BW, typ.)
Harmonic Suppression (2nd, typ.)
Sideband Spurs (typ.)
Power Output
VALUE
950 - 956
-100
-15
-65
2.5±2.5
UNITS
MHz
dBc/Hz
dBc
dBc
dBm
Load Impedance
Step Size
Charge Pump Output Current
Switching Speed (typ., adjacent channel)
Startup Lock Time (typ.)
Operating Temperature Range
50
50
1250
1
1
-40 to 85
Ω
KHz
µΑ
mSec
mSec
°C
Package Style
PLL-24
POWER SUPPLY REQUIREMENTS
Supply Voltage (Vcc, nom.)
5
Supply Current (Icc, typ.)
30
All specifications are typical unless otherwise noted and subject to change without notice.
Vdc
mA
APPLICATION NOTES
• AN-107 : How to Solder Z-COMM VCOs / PLLs
• AN-200 : Mounting and Grounding of Z-COMM PLLs
• AN-201 : PLL Fundamentals
AN-202 : PLL Functional Description
NOTES:
Reference Oscillator Signal: 5 MHz<f _osc<100 MHz
Frequency Synthesizer: Analog Devices - ADF4106
© Z-Communications, Inc.
Page 1
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