PCA0198A Datasheet, PDF (1/2 Pages) Z-Communications, Inc – LOW COST - HIGH PERFORMANCE PHASE LOCKED LOOP

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PCA0198A
PHASE LOCKED LOOP
Rev A1
PHASE NOISE (1 Hz BW, typical)
-70
-80
-90
-100
-110
FEATURES
• Frequency Range: 198 ^- 199 _MHz
• Step Size:
100 _KHz
• _cPLL - Style Package
APPLICATIONS
• Telecommunications
• Satellite
• Telemetry
-120
-130
-140
-150
100
1000
10000
PERFORMANCE SPECIFICATIONS
Frequency Range
Phase Noise @ 10 kHz offset (1 Hz BW, typ.)
Harmonic Suppression (2nd, typ.)
Sideband Spurs (typ.)
Power Output
VALUE
198 - 199
-104
-10
-70
0±2
Load Impedance
50
Step Size
100
Charge Pump Output Current
2500
Switching Speed (typ., adjacent channel)
Startup Lock Time (typ.)
Operating Temperature Range
1.5
1.0
-40 to 85
Package Style
cPLL
POWER SUPPLY REQUIREMENTS
Supply Voltage (Vcc, nom.)
5
Supply Current (Icc, typ.)
45
All specifications are typical unless otherwise noted and subject to change without notice.
100000
1000000
UNITS
MHz
dBc/Hz
dBc
dBc
dBm
Ω
KHz
µΑ
mSec
mSec
°C
Vdc
mA
APPLICATION NOTES
• AN-107 : How to Solder Z-COMM VCOs / PLLs
• AN-200 : Mounting and Grounding of Z-COMM PLLs
• AN-201 : PLL Fundamentals
AN-202 : PLL Functional Description
NOTES:
Reference Oscillator Signal: 5 MHz<f _osc<100 MHz
Frequency Synthesizer: Analog Devices - ADF4001
© Z-Communications, Inc.
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