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ZL49010 Datasheet, PDF (5/14 Pages) Zarlink Semiconductor Inc – Wide Dynamic Range DTMF Receiver
ZL49010/1, ZL49020/1, ZL49030/1
FLOW
FHIGH
DIGIT b3
b2
b1
b0
941
1336
0
1
0
1
0
941
1209
*
1
0
1
1
941
1477
#
1
1
0
0
697
1633
A
1
1
0
1
770
1633
B
1
1
1
0
852
1633
C
1
1
1
1
941
1633
D
0
0
0
0
0= LOGIC LOW, 1= LOGIC HIGH
Note: b0=LSB of decoded DTMF digit and shifted out first.
Table 2 - Serial Decode Bit Table (continued)
Data Sheet
ACK (input)
PWDN (input)
ESt/DStD (output)
SD (output)
low
low
Refer to Fig. 4 for
timing waveforms
low
high+
low
high
low
low
high
high
Note: + =enters powerdown mode on the rising edge.
undefined
Refer to Fig. 4 for
timing waveforms
low
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Table 3 - Powerdown Mode
ZL4901x/4903x
status
normal operation
powerdown mode
undefined
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Frequency 1 (Hz)
350
425
400
480
440
480
440
480
Frequency 2 (Hz)
440
---
---
620
---
620
480
620
On/Off
continuous
continuous
continuous
0.5s/0.5s
0.5s/0.5s
0.25s/0.25s
2.0s/4.0s
0.25s/0.25s
Description
North American Dial Tones
European Dial Tones
Far East Dial Tones
North American Line Busy
Japanese Line Busy
North American Reorder Tones
North American Audible Ringing
North American Reorder Tones
Table 4 - Call Progress Tones
Oscillator
The ZL4902x/4903x can be used in both external clock or two pin oscillator mode. In two pin oscillator mode, the
oscillator circuit is completed by connecting either a 3.579MHz crystal or ceramic resonator across OSC1 and
OSC2 pins. It is also possible to configure a number of these devices (4 maximum) employing only a single
oscillator crystal. The OSC2 output of the first device in the chain is connected to the OSC1 input of the next
device. Subsequent devices are connected similarily. The oscillator circuit can also be driven by an 3.579MHz
external clock applied on pin OSC 1. The OSC2 pin should be left open.
For ZL4901x devices, the CLK input is driven directly by an 3.579MHz external digital clock.
5
Zarlink Semiconductor Inc.