ZL30105 Datasheet, PDF (47/50 Pages) Zarlink Semiconductor Inc – T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110

ZL30105
Data Sheet
Performance Characteristics*: Measured Output Jitter - GR-253-CORE and T1.105.03 conformance
Signal
Telcordia GR-253-CORE and ANSI T1.105.03
Jitter Generation Requirements
Jitter
Measurement
Filter
Limit in
UI
(1 UI = 6.4 ns)
Equivalent
limit in time
domain
ZL30105
maximum jitter
generation
Units
OC-3 Interface
1 C19o
65 kHz to 1.3 MHz 0.15 UI_pp
0.96
2
12 kHz to1.3 MHz 0.1 UI_pp
0.64
3
(Category II)
0.01 UI_rms
64
4
500 Hz to 1.3 MHz 1.5 UI_pp
9.65
* Supply voltage and operating temperature are as per Recommended Operating Conditions.
0.22
0.22
19
0.22
ns_pp
ns_pp
ps_rms
ns_pp
Performance Characteristics*: Measured Output Jitter - G.813 conformance (Option 1 and Option 2)
Signal
ITU-T G.813
Jitter Generation Requirements
Jitter
Measurement
Filter
Limit in
UI
(1 UI = 6.4 ns)
Equivalent limit
in time domain
ZL30105
maximum jitter
generation
Units
STM-1 Option 1 Interface
1 C19o
65 kHz to 1.3 MHz 0.1 UI_pp
0.64
2
500 Hz to 1.3 MHz 0.5 UI_pp
3.22
STM-1 Option 2 Interface
3 C19o
12 kHz to1.3 MHz 0.1 UI_pp
0.64
* Supply voltage and operating temperature are as per Recommended Operating Conditions.
0.22
0.22
0.22
ns_pp
ns_pp
ns_pp
47
Zarlink Semiconductor Inc.