ZL50030 Datasheet, PDF (45/73 Pages) Zarlink Semiconductor Inc – Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 1 K x 1 K Local Switch

ZL50030
Data Sheet
Read/Write Address: 002B_H
Reset Value: 0000_H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CNEN BEN AEN RPS FS1 FS0 FP1 FP0 SS3 SS2 SS1 SS0 SP3 SP2 SP1 SP0
Bit
9-8
Name
FP1 - 0
Description
PRI_REF Frequency Selection Bits: These bits are used to select different clock
frequencies for the primary reference.
FS1
FS0
Primary Reference
0
0
8 kHz
0
1
1.544 MHz
1
0
2.048 MHz
1
1
8.192 MHz (“A Clocks” or “B Clocks”)
7 - 4 SS3 - 0 Secondary Clock Reference Input Selection Bits: These bits are used to select secondary
reference input.
SS3 - SS0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Secondary Clock Reference Input
CTREF1
CTREF2
“A Clocks”
“B Clocks”
Reserved
Reserved
Reserved
Reserved
LREF0
LREF1
LREF2
LREF3
Reserved
Reserved
Reserved
Reserved
Table 19 - DPLL Operation Mode (DOM1) Register Bits (continued)
45
Zarlink Semiconductor Inc.