MT9300B Datasheet, PDF (23/39 Pages) Zarlink Semiconductor Inc – Multi-Channel Voice Echo Canceller

MT9300B
Data Sheet
Echo Canceller A, Flat Delay Register (FD)
Echo Canceller B, Flat Delay Register (FD)
Read/Write Address: 04_H+ Base Address
Read/Write Address: 24_H + Base Address
7
6
5
4
3
2
1
0
FD₇
FD₆
FD₅
FD₄
FD₃
FD₂
FD₁
FD₀
Power Reset Value
00H
Echo Canceller A, Decay Step Number Register (NS)
Echo Canceller B, Decay Step Number Register (NS)
7
6
5
4
3
2
1
Read/Write Address: 07_H + Base Address
Read/Write Address: 27_H + Base Address
0
NS₇
NS₆
NS₅
NS₄
NS₃
NS₂
NS₁
NS₀
Power Reset Value
00H
Echo Canceller A, Decay Step Size Control Register (SSC)
Echo Canceller B, Decay Step Size Control Register (SSC)
7
6
5
4
3
2
1
Read/Write Address: 06_H + Base Address
Read/Write Address: 26_H + Base Address
0
0
0
0
0
0
SSC₂
SSC₁
SSC₀
Note: Bits marked with “0” are reserved bits and should be written “0”.
Power Reset Value
04H
Amplitude of MU
1.0
FIR Filter Length (512 or 1024 taps)
Step Size (SS)
Flat Delay (FD_7-0)
2^-16
Time
Number of Steps (NS_7-0)
The Exponential Decay registers (Decay Step Number and Decay Step Size) and Flat Delay register allow the LMS adaptation step-
size (MU) to be programmed over the length of the FIR filter. A programmable MU profile allows the performance of the echo
canceller to be optimized for specific applications. For example, if the characteristic of the echo response is known to have a flat
delay of several milliseconds and a roughly exponential decay of the echo impulse response, then the MU profile can be
programmed to approximate this expected impulse response thereby improving the convergence characteristics of the Adaptive
Filter. Note that in the following register descriptions, one tap is equivalent to 125 µs (64 ms/512 taps).
FD_7-0
Flat Delay: This register defines the flat delay of the MU profile, (i.e., where the MU value is 2^-16). The delay is defined as
FD_7-0 x 8 taps. For example; if FD_7-0 = 5, then MU=2^-16 for the first 40 taps of the echo canceller FIR filter. The valid range
of FD_7-0 is: 0 £ FD_7-0 £ 64 in normal mode and 0 £ FD_7-0 £ 128 in extended-delay mode. The default value of FD_7-0 is zero.
SSC_2-0
Decay Step Size Control: This register controls the step size (SS) to be used during the exponential decay of MU. The
decay rate is defined as a decrease of MU by a factor of 2 every SS taps of the FIR filter, where SS = 4 x2^SSC2-0. For
example; If SSC_2-0 = 4, then MU is reduced by a factor of 2 every 64 taps of the FIR filter. The default value of SSC_2-0 is
04h.
NS_7-0
Decay Step Number: This register defines the number of steps to be used for the decay of MU where each step has a period
of SS taps (see SSC_2-0). The start of the exponential decay is defined as:
Filter Length (512 or 1024) - [Decay Step Number (NS_7-0) x Step Size (SS)] where SS = 4 x2^SSC2-0.
For example, if NS_7-0=4 and SSC_2-0=4, then the exponential decay start value is 512 - [NS_7-0 x SS] = 512 - [4 x (4x2⁴)] = 256
taps for a filter length of 512 taps.
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