SP5524 Datasheet, PDF (2/10 Pages) Zarlink Semiconductor Inc – Bidirectional I2C Bus Controlled Synthesiser

SP5524
Bidirectional I2C Bus Controlled Synthesiser
DS3900 - 2.1 March 1995
The SP5524 is a single-chip frequency synthesiser designed
for TV tuning systems. Control data is entered in the standard
I²C BUS format. The device has six controllable open-collector
output ports (P0-P3, P6 and P7), each capable of sinking
10mA. In addition, P1 is a 3-bit 5-level ADC input. The information
on these ports can be read via the I²C BUS.
The device has one fixed I²C BUS address and three
programmable addresses, allowing two or more synthesisers
to be used in a system.
FEATURES
s Complete 1·3GHz Single Chip System
s Programmable via the I²C BUS
s Low Power Consumption (215mW Typ.)
s Low Radiation
s Phase Lock Detector
s Varactor Drive Amp Disable
s 6 Controllable Outputs, 4 Bi-directional
s 5-Level ADC
s Variable I²C BUS Address for Picture in Picture TV
s ESD Protection *
* Normal ESD handling precautions should be observed.
CHARGE PUMP
CRYSTAL Q1
CRYSTAL Q2
SDA
SCL
¦ I/O PORT P0
* I/O PORT P1
¦ I/O PORT P2
1
16
SP5524S
8
9
DRIVE OUTPUT
V_EE
RF INPUT
RF INPUT
V_CC
P6 OUTPUT PORT
P7 OUTPUT PORT/ADD SELECT
I/O PORT P3 ¦
MP16
Fig. 1 Pin connections – top view
APPLICATIONS
s Satellite TV when Combined with SP4902
2·5GHz Prescaler
s Cable Tuning Systems
s VCRs
ORDERING INFORMATION
SP5524S KG MPAS (Tubes)
SP5524S KG MPAD (Tape and Reel)