MVTX2604 Datasheet, PDF (125/173 Pages) Zarlink Semiconductor Inc – Managed 24-Port 10/100 Mb + 2 Port 1 Gb Ethernet Switch

MVTX2604
Data Sheet
Ball No(s)
P4
Symbol
LB_WE0#
I/O
Output with pull up
P5
LB_WE1#
Output with pull up
V2
LB_OE#
Output with pull up
U1
LB_OE0#
Output with pull up
U2
LB_OE1#
Output with pull up
Fast Ethernet Access Ports [23:0] RMII
R28
M_MDC
Output
P28
M_MDIO
I/O-TS with pull up
R29
M_CLKI
AC29, AE28, AJ27,
AF27, AJ25, AF24,
AH23, AE19, AF21,
AJ19, AF18, AJ17,
AJ15, AF15, AJ13,
AF12, AJ11, AJ9,
AF9, AJ7, AF6,
AJ5, AJ3, AF1
M[23:0]_RXD[1]
AC28, AF28, AH27,
AE27, AH25, AE24,
AF22, AF20, AE21,
AH19, AH20,
AH17, AH15,
AE15, AH13, AE12,
AH11, AH9, AE9,
AH7, AE6, AH5,
AH2, AF2
M[23:0]_RXD[0]
Input
Input with weak
internal pull up
resistors.
Input with weak
internal pull up
resistors
Description
Frame Bank B Write Chip Select for
lower layer of two layer SRAM
configuration
Frame Bank B Write Chip Select for
upper layer of two layers SRAM
configuration
Frame Bank B Read Chip Select for
one layer SRAM configuration
Frame Bank B Read Chip Select for
lower layer of two layers SRAM
configuration
Frame Bank B Read Chip Select for
upper layer of two layers SRAM
configuration
MII Management Data Clock –
(Common for all MII Ports [23:0])
MII Management Data I/O –
(Common for all MII Ports –[23:0]))
Reference Input Clock
Ports [23:0] – Receive Data Bit [1]
Ports [23:0] – Receive Data Bit [0]
127
Zarlink Semiconductor Inc.