MT9045 Datasheet, PDF (11/34 Pages) Zarlink Semiconductor Inc – T1/E1/OC3 System Synchronizer

MT9045
Data Sheet
temperature, while the MT9045 is in Holdover Mode may result in an additional offset (over the ±0.05ppm) in
frequency accuracy of ±1ppm. Which is much greater than the ±0.05ppm of the MT9045.
The other factor affecting accuracy is large jitter on the reference input prior (30ms to 60ms) to the mode switch.
For instance, jitter of 7.5UI at 700Hz may reduce the Holdover Mode accuracy from ±0.05ppm to ±0.10ppm.
Freerun Mode
Freerun Mode is typically used when a master clock source is required, or immediately following system power-up
before network synchronization is achieved.
In Freerun Mode, the MT9045 provides timing and synchronization signals which are based on the master clock
frequency (OSCi) only, and are not synchronized to the reference signals (PRI and SEC).
The accuracy of the output clock is equal to the accuracy of the master clock (OSCi). So if a ±32ppm output clock
is required, the master clock must also be ±32ppm. See Applications - Crystal and Clock Oscillator sections.
MT9045 Measures of Performance
The following are some synchronizer performance indicators and their corresponding definitions.
Intrinsic Jitter
Intrinsic jitter is the jitter produced by the synchronizing circuit and is measured at its output. It is measured by
applying a reference signal with no jitter to the input of the device, and measuring its output jitter. Intrinsic jitter may
also be measured when the device is in a non-synchronizing mode, such as free running or holdover, by measuring
the output jitter of the device. Intrinsic jitter is usually measured with various bandlimiting filters depending on the
applicable standards. In the MT9045, the intrinsic Jitter is limited to less than 0.02UI on the 2.048MHz and
1.544MHz clocks.
Jitter Tolerance
Jitter tolerance is a measure of the ability of a PLL to operate properly (i.e., remain in lock and or regain lock in the
presence of large jitter magnitudes at various jitter frequencies) when jitter is applied to its reference. The applied
jitter magnitude and jitter frequency depends on the applicable standards.
Jitter Transfer
Jitter transfer or jitter attenuation refers to the magnitude of jitter at the output of a device for a given amount of jitter
at the input of the device. Input jitter is applied at various amplitudes and frequencies, and output jitter is measured
with various filters depending on the applicable standards.
For the MT9045, two internal elements determine the jitter attenuation. This includes the internal 1.9Hz low pass
loop filter and the phase slope limiter. The phase slope limiter limits the output phase slope to 5ns/125us.
Therefore, if the input signal exceeds this rate, such as for very large amplitude low frequency input jitter, the
maximum output phase slope will be limited (i.e., attenuated) to 5ns/125us.
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Zarlink Semiconductor Inc.