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MT89L80 Datasheet, PDF (11/17 Pages) Mitel Networks Corporation – CMOS ST-BUS™ FAMILY Digital Switch
MT89L80
Data Sheet
VHM
C4i
VLM
VHM
F0i
VLM
tCLK
tCL
tCTT
tFPH
tCHL
tFPS
tCTT
tFPH
tFPW
tCH
tFPS
Figure 10 - Clock Timing
AC Electrical Characteristics† - Serial Streams (Figures 11, 12 and 13)
Characteristics
Sym. Min. Typ.‡ Max. Units
Test Conditions
1 O STo0/7 Delay - Active to High Z tSAZ
5
2
U
T
STo0/7 Delay - High Z to Active
tSZA
5
3 P STo0/7 Delay - Active to Active tSAA
5
4
U
T
Output Driver Enable Delay
tOED
5 S External Control Delay
tXCD
55
ns RL=1 KΩ*, CL=150 pF
55
ns CL=150 pF
55
ns CL=150 pF
50
ns RL=1 KΩ*, CL=150 pF
55
ns CL=150 pF
6 I Serial Input Setup Time
tSIS
20
ns
7 N Serial Input Hold Time
tSIH
20
ns
† Timing is over recommended temperature & power supply voltages.
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
* High Impedance is measured by pulling to the appropriate rail with RL, with timing corrected to cancel time taken to discharge CL.
11
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