ZL50418 Datasheet, PDF (103/163 Pages) Zarlink Semiconductor Inc – Managed 16-Port 10/100 M + 2-Port 1 G Ethernet Switch

ZL50418
Data Sheet
Bit [4]:
Bit [5]:
Bit [6]:
Disable IP Multicast Support (Default 1)
• 0 – Enable IP Multicast Support
• 1 – Disable IP Multicast Support
When enable, IGMP packets are identified by search engine and are passed to
the CPU for processing. IP multicast packets are forwarded to the IP multicast
group members according to the VLAN port mapping table.
Enable report to CPU(Default 0)
• 0 – Disable report to CPU
• 1 – Enable report to CPU
When disable new VLAN port association report, new MAC address report or
aging reports are disable for all ports. When enable, register SE_OPEMODE is
used to enable/disable selectively each function.
Disable MII Management State Machine (Default 0)
• 0: Enable MII Management State Machine
• 1: Disable MII Management State Machine
14.10.4 MIIC0 – MII Command Register 0
CPU Address:h603
Accessed by CPU and serial interface only (R/W)
• Bit [7:0] - MII Data [7:0]
Note: Before programming MII command: set FEN[6], check MIIC3, making sure no RDY, and no VALID; then
program MII command.
14.10.5 MIIC1 – MII Command Register 1
CPU Address:h604
Accessed by CPU and serial interface only (R/W)
• Bit [7:0] - MII Data [15:8]
Note: Before programming MII command: set FEN[6], check MIIC3, making sure no RDY and no VALID; then pro-
gram MII command.
14.10.6 MIIC2 – MII Command Register 2
CPU Address:h605
Accessed by CPU and serial interface only (R/W)
7654
0
Mii OP Register address
• Bit [4:0] - REG_AD – Register PHY Address
• Bit [6:5] - OP – Operation code “10” for read command and “01” for write command
Note: Before programming MII command: set FEN[6], check MIIC3, making sure no RDY and no VALID; then
program MII command.
103
Zarlink Semiconductor Inc.