ZL70100 Datasheet, PDF (1/6 Pages) Zarlink Semiconductor Inc – Medical Implantable RF Transceiver

ZL70100
Medical Implantable RF Transceiver
Data Sheet
Features
• 402-405 MHz (10 MICS channels) and
433-434 MHz (2 ISM channels)
• High data rate (800/400/200 kbps raw data rate)
• High performance MAC with automatic error
handling and flow control, typ < 1.5x10^-10 BER.
• Very few external components
(2 pcs + antenna matching)
• Extremely low power consumption (5 mA,
continuous TX/RX, <1 mA low power mode)
• Ultra low power wakeup circuit (200 nA)
• Standards compatible (MICS, FCC, IEC)
Applications
• Implantable Devices e.g., Pacemakers, ICD’s,
Cochlea implants, Neurostimulators, Implantable
Insulin Pumps, Bladder Control Devices,
implantable physiological monitors
• Body area network, short range device
applications using the 433 MHz ISM band.
May 2005
Ordering Information
ZL70100LDF1 - 48 pin QFN* (tape & reel,
bake and drypack)
ZL70100LDG1 -48 pin QFN* (tray, bake and
drypack)
*Pb Free Matte Tin
0°C to +55°C
Description
The ZL70100 is a high performance half duplex RF
communications link for medical implantable
applications. The system is very flexible and supports
several low power wakeup options. Extremely low
power is achievable using the 2.45 GHz ISM Band
Wakeup-receiver option. The high level of integration
includes a Media Access Controller, providing
complete control of the device along with coding and
decoding of RF messages. A standard SPI interface
provides for easy access by the application
For further information please contact sales.
24 MHz
Zarlink MICS Transceiver - ZL70100
400MHz Transceiver
ADC analog Inputs
(TESTIO[4:1]pins)
TX
400 MHz
4 To ADCMux
PowerAmplifier Mixer
RF 400 MHz _{T X}
+
RX
400 MHz
P eakDetec tor
Antenna
Matc hi ng
LowNoi s e
Amplifier
RF 400 MHz
RX
Mixer
PLL
T XIFModulator
AnalogInputs
4
RSSI
5bit
ADC
tx_data
tx_c l k
DataBus
RX IFFilterand FMDetector
RX _{rx_data}
ADC
RX
2.45 GHz
2.45 GHz Wake-Up Receiver
RF 2.45 GHz
RX
Antenna
Matching
Wake-Up
Control
Enable
UltraLow
Power
Os c i l l ator
Regulator
1.85-2.0V
2
M e diaAcce s s Contr olle r
Whitening
RS
Encoder
CRC
Generation
Mes s age
Storage
Correlator
Cl oc k
Rec overy
T XControl
Control
RX Control
Interface
SPI
Programmable
4 _PO[3:0]
IO
3 _PI[2:0]
SPI_CS_B
SPI_CLK
SPI_SDI
SPI_SDO
SPI
Interf ace
IRQ
RSDecode
CRC
Dec ode
Mes s age
Storage
TestModeControl ² MODE[1:0]
InputP i nP ul l -downControl
PDCTRL
Bypas s ofon-c hi pCrys tal Os c i l l atorControl
XO_BY PASS
SelectIMDorBaseT ransceiver
WakeupIMD
IBS
WU_EN
Batteryor
OtherS uppl y
68nFDecoupling
Capac i tor
Figure 1 - ZL70100 Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2005, Zarlink Semiconductor Inc. All Rights Reserved.