ZL50063 Datasheet, PDF (1/60 Pages) Zarlink Semiconductor Inc – 16K-Channel Digital Switch with High Jitter Tolerance, Single Rate (32Mbps), and 32 Inputs and 32 Output

ZL50063
16K-Channel Digital Switch with High Jitter
Tolerance, Single Rate (32Mbps),
and 32 Inputs and 32 Output
Data Sheet
Features
• 16,384-channel x 16,384-channel non-blocking
unidirectional switching.The Backplane and Local
inputs and outputs can be combined to form a
non-blocking switching matrix with 32 input
streams and 32 output streams
• 8,192-channel x 8,192-channel non-blocking
Backplane input to Local output stream switch
• 8,192-channel x 8,192-channel non-blocking
Local input to Backplane output stream switch
• 8,192-channel x 8,192-channel non-blocking
Backplane input to Backplane output switch
• 8,192-channel x 8,192-channel non-blocking
Local input to Local output stream switch
• Backplane port accepts 16 input and 16 output
ST-BUS streams with data rate of 32.768Mbps
• Local port accepts 16 input and 16 output ST-
BUS streams with data rate of 32.768Mbps
• Exceptional input clock jitter tolerance (14ns)
• Per-stream bit delay for Local and Backplane
input streams
• Per-stream advancement for Local and
Backplane output streams
November 2003
Ordering Information
ZL50063GAC 196-Ball PBGA
-40°C to +85°C
• Constant 2-frame throughput delay for frame
integrity
• Per-channel high impedance output control for
Local and Backplane streams
• Per-channel driven-high output control for Local
and Backplane streams
• Per-channel message mode for Local and
Backplane output streams
• Connection memory block programming for fast
device initialization
• Automatic selection between ST-BUS and GCI-
Bus operation
• Non-multiplexed Motorola microprocessor
interface
V_{DD_IO} V_{DD_CORE}
V_{SS (GND)}
RESET
ODE
BSTi0-15
Backplane Data Memories
(4,096 channels)
Local
Interface
LSTi0-15
BSTo0-15
Backplane
Interface
Backplane
Connection Memory
(4,096 locations)
Local
Connection Memory
(4,096 locations)
Local
Interface
LSTo0-15
BORS
FP8i
C8i
Input
Timing Unit
PLL
Local Data Memories
(4,096 channels)
Microprocessor Interface
and Internal Registers
Output
Timing
Unit
Test Port
LORS
FP8o
FP16o
C8o
C16o
V_{DD_PLL}
DS CS R/W A14-0 DTA D15-0 TMS TDi TDo TCK TRST
Figure 1 - ZL50063 Functional Block Diagram
1
Zarlink Semiconductor Inc.
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Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved.