ZL38065 Datasheet, PDF (1/48 Pages) Zarlink Semiconductor Inc – 32 Channel Voice Echo Canceller

ZL38065
32 Channel Voice Echo Canceller
Features
• Independent multiple channels of echo
cancellation; from 32 channels of 64 ms to 16
channels of 128 ms with the ability to mix
channels at 128 ms or 64 ms in any combination
• Fully compliant to ITU-T G.165, G.168 (2000) and
(2002) specifications
• Passed all AT&T voice quality tests for carrier
grade echo canceller systems.
• Unparalleled in-system tunability
• Sub 50 ms initial convergence times under many
typical network conditions
• Fast reconvergence on echo path changes
• Patented Advanced Non-Linear Processor with
high quality subjective performance
• Superior noise matching algorithm
• PCM coding, µ/A-Law ITU-T G.711 or sign
magnitude
• Per channel Fax/Modem G.164 2100 Hz or G.165
2100 Hz phase reversal Tone Disable
• Per channel echo canceller parameters control
• Transparent data transfer and mute
• Protection against narrow band signal divergence
and instability in high echo environments
Data Sheet
July 2005
Ordering Information
ZL38065QCG 100 Pin LQFP Trays, Bake & Drypack
ZL38065GDG 208 Ball LBGA Trays, Bake & Drypack
ZL38065QCG1 100 Pin LQFP* Trays, Bake & Drypack
*Pb Free Matte Tin
-40°C to +85°C
• +9 dB to -12 dB level adjusters (3 dB steps) at all
signal ports
• Offset nulling of all PCM channels
• Independent Power Down mode for each group of
2 channels for power management
• Compatible to ST-BUS and GCI interface at
2 Mbps serial PCM
• 3.3 V pads and 1.8 V Logic core operation with
5 V tolerant inputs
• IEEE-1149.1 (JTAG) Test Access Port
Applications
• Voice over IP network gateways
• Voice over ATM, Frame Relay
• T1/E1/J1 multichannel echo cancellation
• Wireless base stations
• Echo Canceller pools
Rin
Sin
MCLK
Fsel
C4i
F0i
V_{DD1 (3.3V)}
V_SS
V_{DD2 (1.8 V)}
ODE
Serial
to
Parallel
PLL
Timing
Unit
Echo Canceller Pool
Group 0 Group 1 Group 2 Group 3
ECA/ECB ECA/ECB ECA/ECB ECA/ECB
Group 4 Group 5 Group 6 Group 7
ECA/ECB ECA/ECB ECA/ECB ECA/ECB
Group 8 Group 9 Group 10 Group 11
ECA/ECB ECA/ECB ECA/ECB ECA/ECB
Group 12 Group 13 Group 14 Group 15
ECA/ECB ECA/ECB ECA/ECB ECA/ECB
Parallel
to
Serial
Note:
Refer to Figure 4
for Echo Canceller
block diagram
Microprocessor Interface
Test Port
Rout
Sout
IC0
RESET
DS CS R/W A12-A0 DTA D7-D0 IRQ TMS TDI TDO TCK TRST
Figure 1 - ZL38065 Device Overview
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2004-2005, Zarlink Semiconductor Inc. All Rights Reserved.