WL100 Datasheet, PDF (1/17 Pages) Zarlink Semiconductor Inc – WLAN INTERFACE CIRCUIT

WL100
WLAN INTERFACE CIRCUIT
MAY 1996
ADVANCE INFORMATION
DS4054-2.2
The WL100, together with the DE6003 frequency hopping
radio transceiver, implements a wide variety of WLAN
applications where NRZ encoding is used.
FEATURES
I Low Power CMOS Technology
I Flexible Data Transceiver
I Clock Recovery with Continuous Calibration for
Flexible Packet Length
I Flexible Preamble Format
I Selectable Data Rates: 156·25kb/s, 250kb/s,
312·5kb/s, 500kb/s, 625kb/s and 1Mb/s
I CRC-32 Generator/Checker
I Fast Antenna Diversity with Manual Override
I Battery Level Monitoring
I 8-Bit Parallel Controller Interface
RELATED DOCUMENTS
DE6003 data sheet, DS3506
GPS application notes AN142,143,144,145, 154 and 203
for further design information.
ORDERING INFORMATION
WL100/CG/FP1R - Commercial, Quad Plastic Flatpack
Prior to completion of full device characterisation, pre-
production parts will be designated WL100/PR/FP1R.
RD
WR
RESET
CKSEL1
CKSEL0
E_CLK
V_DD
V_SS
B_CLK
C_CLK
TEST
ATSTIN
ATSTOUT
XCKT
RXD
SYNLOK
PIN 1 IDENT
WL100
PIN 1
PIN 64
NC
NC
IRQ
V_SS
V_BAT
SHCAP
RSSI
NC
NC
V_REF
STDBY
V_DD
ANTSEL
V_SS
NC
NC
FP64
Fig. 1 Pin connections (top view). See Table 8 for pin
descriptions.
DE6003
FREQUENCY
HOPPING
TRANSCEIVER
WL100
WLAN INTERFACE CIRCUIT
WLAN
MAC
CONTROLLER
HOST
MICRO-
PROCESSOR
Fig. 2 WLAN system block diagram