NJ88C50 Datasheet, PDF (1/17 Pages) Mitel Networks Corporation – Dual Low Power Frequency Synthesiser

NJ88C50
Dual Low Power Frequency Synthesiser
The NJ88C50 is a low power integrated circuit, designed
as the heart of a fast locking PLL subsystem in a mobile radio
application. It is manufactured on Mitel Semiconductor 1.4
micron double polysilicon CMOS process, which ensures that
low power and low noise performance is achieved. The device
contains two synthesisers, one for the generation of VHF
signals up to 125MHz and a second for UHF (when used with
a mulitmodulus prescaler such as the SP8713/14/15). The
main synthesiser has the capability of driving a dual speed
loop filter and also can perform Fractional-N interpolation.
Both synthesisers use current source outputs from their
phase detectors to minimise external components. Various
sections may be powered down for battery economy.
FEATURES
• 30MHz main synthesiser
• 125MHz auxiliary synthesiser
• Programmable output current
from phase detector - up to 10mA
• High input sensitivity
• Fractional-N interpolator
• Supports up to 4 modulus prescalers
• SSOP package
DS3805
ISSUE 1.8
Ordering Information
NJ88C50/MA/NP - (Industrial temp
range in SSOP package)
June 2002
AVDD
FIM
FIMB
DATA
CKIN
STROBE
RI
FIA
RSA
PDA
1
20
2
19
3
18
4
17
5 NJ88C50 16
6
15
7
14
8
13
9
12
10
11
AGND
MOD2
MOD1
SCREEN
RSC
RSM
VDD
PDP
GND
PDI
APPLICATIONS
• NMT, AMPS, ETACS cellular
• GSM, IS-54, RCR-27 cellular
• DCS1800 microcellular
• DLMR, DSRR, TETRA
• DECT, PHP cordless telephones
NP20
Figure 1 - Pin assignment
ABSOLUTE MAXIMUM RATINGS
Storage temperature
-55°C to +150°C
Operating temperature
-40°C to +85°C
Supply voltage
-0.5 to 7.0V
Voltage on any pin
-0.3V to (VDD + 0.3V)
FIM
FIMB
DATA
CKIN
STROBE
RI
FIA
MOD1
MOD2
MAIN N
BUFFER
SERIAL
INPUT
REGISTER
R BUFFER
AUX. N
BUFFER
MAIN N-DIVIDER
LATCH
LATCH
R DIVIDER
QBAR
Q
LATCH
AUX. N-DIVIDER
PHASE
DETECTOR
RSC RSM
CURRENT
PDI
SOURCE
PDP
LATCH
FRACTIONAL-N
SYSTEM
PHASE
DETECTOR
CURRENT
SOURCE
PDA
RSA
Figure 2 - Simplified block diagram