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MT9046 Datasheet, PDF (1/34 Pages) Zarlink Semiconductor Inc – T1/E1 System Synchronizer with Holdover
Features
• Supports AT&T TR62411 and Bellcore GR-1244-
CORE, Stratum 4 Enhanced and Stratum 4 timing
for DS1 interfaces
• Supports ETSI ETS 300 011, TBR 4, TBR 12 and
TBR 13 timing for E1 interfaces
• Selectable 19.44 MHz, 1.544 MHz, 2.048 MHz or
8kHz input reference signals
• Provides C1.5, C2, C4, C6, C8, C16, and C19
(STS-3/OC3 clock divided by 8) output clock
signals
• Provides 5 styles of 8 KHz framing pulses
• Holdover frequency accuracy of 0.2 PPM
• Holdover indication
• Attenuates wander from 1.9 Hz
• Fast lock mode
• Provides Time Interval Error (TIE) correction
• Accepts reference inputs from two independent
sources
• JTAG Boundary Scan
MT9046
T1/E1 System Synchronizer
with Holdover
Data Sheet
April 2004
Ordering Information
MT9046AN 48 pin SSOP
-40°C to +85°C
Applications
• Synchronization and timing control for Customer
Premises Equipment (CPE)
• ST-BUS clock and frame pulse sources
Description
The MT9046 T1/E1 System Synchronizer contains a
digital phase-locked loop (DPLL), which provides timing
and synchronization signals for multitrunk T1 and E1
primary rate transmission links. The device has
reference switching and frequency holdover capabilities
to help maintain connectivity during temporary
synchronization interruptions.
OSCi
OSCo
TCLR
LOCK VDD VSS
TCK
TDI
TMS
TRST
TDO
PRI
SEC
RSEL
Master Clock
IEEE
1149.1a
TIE
Corrector
Circuit
Virtual
Reference
DPLL
Reference
Select
MUX
Selected
Reference
TIE
Corrector
Enable
Reference
Select
State
Select
State
Select
Input
Impairment
Monitor
Control State Machine
Feedback
Output
Interface
Circuit
Frequency
Select
MUX
C19o
C1.5o
C2o
C4o
C6o
C8o
C16o
F0o
F8o
F16o
RSP
TSP
MS1 MS2 RST HOLDOVER PCCi FLOCK
FS1
FS2
Figure 1 - Functional Block Diagram
Zarlink Semiconductor US Patent No. 5,602,884, UK Patent No. 0772912,
France Brevete S.G.D.G. 0772912; Germany DBP No. 69502724.7-08
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003 - 2004, Zarlink Semiconductor Inc. All Rights Reserved.