YB1692 Datasheet, PDF (6/10 Pages) YOBON TECHNOLOGIES,INC. – 2A Synchronous Step-Down Converter

YB1692
2A Synchronous Step-Down Converter
current rating greater than half of the
maximum load current. The input capacitor
can be electrolytic, tantalum or ceramic.
When using electrolytic or tantalum ca-
pacitors, a small, high quality ceramic
capacitor ,i.e. 0.1μF, should be placed as
close to the IC as possible.When using
ceramic capacitors, make sure that they have
enough capacitance to pro- vide sufficient
charge to prevent excessive volt- age ripple at
input. The input voltage ripple for low ESR
capacitors can be estimated by:
Where C1 is the input capacitance value.
Output Capacitor
The output capacitor is required to maintain
the DC output voltage. Ceramic, tantalum, or
low ESR electrolytic capacitors are
recommended. Low ESR capacitors are
preferred to keep the output voltage ripple low.
The output voltagerip- ple can be estimated
by:
Where C2 is the output capacitance value and
RESR is the equivalent series resistance
(ESR) value of the output capacitor. In the
case of ceramic capacitors, the impedance at
the switching frequency is dominated by the
capacitance. The output voltage ripple is
mainly caused by the capacitance. For
simplification, the output voltage ripple can
be estimated by:
In the case of tantalum or electrolytic
capacitors, the ESR dominates the
impedance at the switch- ing frequency. For
simplification, the output ripple can be
approximated to:
The characteristics of the output capacitor
also affect the stability of the regulation
system. The YB1692 can be optimized for a
wide range of capacitance and ESR values.
Compensation Components
YB1692 employs current mode control for
easy compensation and fast transient
response. The system stability and transient
response are controlled through the COMP
pin. COMP pin is the output of the internal
transconductance error amplifier. A series
capacitor-resistor combination sets a
pole-zero com- bination to control the
characteristics of the control system.
The DC gain of the voltage feedback loop is
given by:
Where V_FB is the feedback voltage, 0.925V;
AVEA is the error amplifier voltage gain; GCS
is the current sense transconductance and
RLOAD is the load resistor value.
The system has two poles of importance. One
is due to the compensation capacitor (C3) and
the output resistor of the error amplifier, and
the other is due to the output capacitor and
the load resistor. These poles are located at:
Where GEA is the error amplifier
transconductance.
The system has one zero of importance, due
to the compensation capacitor (C3) and the
compensation resistor (R3). This zero is
located at:
The system may have another zero of
importance, if the output capacitor has a large
capacitance and/or a high ESR value. The
zero, due to the ESR and ca- pacitance of the
output capacitor, is located at:
In this case (as shown in Figure 4), a third
pole set by the compensation capacitor (C6)
and the compensa- tion resistor (R3) is used
to compensate the effect of the ESR zero on
the loop gain. This pole is located at:
YB1692 Rev.1.0
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