YDA143 Datasheet, PDF (6/22 Pages) YAMAHA CORPORATION – D- 3M STEREO 15W DIGITAL AUDIO POWER AMPLIFIER

ç
çççYDA143
■Description of operating functions
ç
●Digital Amplifier Function
ç
YDA143 has digital amplifiers with analog input, PWM pulse output, Maximum output of 15W (R_L=4Ω)ʷ2ch.
Distortion of PWM pulse output signal and noise of the signal is reduced by adopting “Pure Pulse Direct Speaker Drive
Circuit”
First Stage Amplifier Gain Setting Function
YDA143 is composed of the first stage amplifier with gain setting control and 18dB fixed-gain digital amplifier. Gain of the
first stage amplifier can be set by GAIN[1:0] terminal.
Digital Amplifier Gain Setting
GAIN[1:0]
Gain
L
L
36dB
L
H
30dB
H
L
24dB
H
H
18dB
Input Sensitivity
0.14Vrms
0.28Vrms
0.56Vrms
1.12Vrms
Input Impedance (RIN)
12.1kΩ
22.0kΩ
37.1kΩ
56.5kΩ
Connect a 0.22µF or more capacitor to the audio signal input terminal (INL and INR) for the rejection of DC signal.
And, half voltage of REFA terminal voltage (V_REG) is output to the reference voltage terminals (VREFL and VREFR).
Connect a 1µF or more capacitor to the terminals for voltage stabilization.
Carrier Clock Selection Function
YDA143 can select the followings by using MODE[2:0] terminal: selection of Internal clock/External clock, selection of
Master mode/Slave mode, selection of carrier clock frequency.
MODE[2:0] setting and each operating mode
MODE[2:0]
Operating Mode
LLL
External Clock Slave Mode
L LH
LHL
External Clock Master Mode
L HH
H L L Internal Clock Slave Mode
H L H Reserved
H H L Internal Clock Master Mode
H H H Reserved
CKIO terminal
4.19MHz input
4.19MHz output
500kHz input
CERALOCK
Unnecessary
Necessary
Unnecessary
Carrier Clock Frequency
524kHz
466kHz
524kHz
466kHz
500kHz
500kHz output Unnecessary 500kHz
When using in External Clock Mater Mode, connect a 4.19MHz oscillator (CERALOCK) between XI and XO terminal as
shown in Fig. 1. When using in other operating mode, external element to XI and XO terminal is unnecessary. At this time,
XI terminal is connected to ground and XO terminal is no connection as shown in Fig. 2.
When using in multi-channel, use one YDA143 (2ch) in Master Mode and use other YDA143 in Slave Mode. At this time,
connect CKIO terminal of YDA143 used in Master Mode and that of YDA143 used in Slave Mode. In addition, select the
same clock (either Internal Clock or External Clock) in all YDA143.
The setting terminal for carrier clock frequency (MODE0) can be changed at any timing.
The setting terminal for clock mode (MODE2, MODE1) should be changed during power-off or sleep mode (SLEEPN=L).
6