GFR1K5 Datasheet, PDF (23/29 Pages) XP Power Limited – 1U Blind-Mate Hotswap Redundant

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Block Protocols:
Block Write:
1
7
11
8
1
8
1
S Slave Address Wr A Command Code A Data Byte = N A
8
1
Data Byte 1 A
8
Data Byte 2
1 ^...
A ^...
8
Data Byte N
11
AP
Block Read:
1
7
11
8
11
7
11
8
1
8
1
8
1 ^...
S Slave Address Wr A Command Code A S Slave Address Rd A Data Byte = N A Data Byte 1 A Data Byte 2 A ^...
8
Data Byte N
11
AP
Data Registers (Standard Data Responses)
The data registers inside the unit are divided into two types: 1) read only data and 2) R/W data. Therefore, the R/W bit in the address
byte needs to be set high in order to read the status bytes, or set low in order to write data into the status bytes.
The first byte of a Write Byte/Word access is the command code. The next one or two bytes are the data to be written. In this
example, the master asserts the slave device address followed by the write bit. The device acknowledges, and then the master
delivers the command code. The slave again acknowledges before the master sends the data byte or word (low byte first). The slave
acknowledges each byte, and the entire transaction is finished with a STOP condition.
Write Word Protocol:
1
7
11
8
1
8
1
8
11
S Slave Address Wr A Command Code A Data Byte Low A Data Byte High A P
Reading data is slightly more complicated than writing data. First the host must write a command to the slave device. Then the host
must follow that command with a repeated START condition to denote a read from that device’s address. The slave then returns one
or two bytes of data.
Note that there is no STOP condition before the repeated START condition, and that a NACK signifies the end of the read transfer.
Read Word Protocol:
1
7
11
8
11
7
11
8
1
8
11
S Slave Address Wr A Command Code A S Slave Address Rd A Data Byte Low A Data Byte High A P
Alarm Data Register (STATUS_WORD) (Register 79h) Read Example
Master to Power Supply Data
Start
Address Byte
S
1
0
1
1
x
x
x
A6
A5
A4
A3
A2
A1
A0
Power Supply to Master Data
ACK
0
A
r/w
Master to Power Supply Data
Power Supply to Master Data
CMD Data
ACK
0
1
1
1
1
1
0
1
A
Status Byte 79h
Master to Power Supply Data
Power Supply to Master Data
Start
Address Byte
ACK
Register Information (Low Byte)
S
1
0
1
1
x
x
x
1
A
0
0
1
1
x
x
x
1
A6 A5 A4 A3 A2 A1 A0 r/w
P7 P6 P5 P4 P3 P2 P1 P0
10011388 revision B
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