DS485 Datasheet, PDF (5/6 Pages) National Semiconductor (TI) – Low Power RS-485/RS-422 Multipoint Transceiver

Table 2: Summary of DCM Module I/O (Cont’d)
Signal
I/O
Initial
State
Description
CLK270
O
Same as If C_CLK270_BUF = true, a BUFG is inserted; otherwise, this signal is
primitive connected to the equivalent pin of DCM directly.
CLKDV
O
Same as If C_CLKDV_BUF = true, a BUFG is inserted; otherwise, this signal is
primitive connected to the equivalent pin of DCM directly.
CLK2X
O
Same as If C_CLKFX_BUF = true, a BUFG is inserted; otherwise, this signal is
primitive connected to the equivalent pin of DCM directly.
CLK2X180
O
Same as If C_CLK2X180_BUF = true, a BUFG is inserted; otherwise, this signal is
primitive connected to the equivalent pin of DCM directly.
CLKFX
O
Same as If C_CLKFX_BUF = true, a BUFG is inserted; otherwise, this signal is
primitive connected to the equivalent pin of DCM directly.
CLKFX180
O
Same as If C_CLKFX180_BUF = true, a BUFG is inserted; otherwise, this signal
primitive is connected to the equivalent pin of DCM directly.
STATUS
O
Same as
primitive
Connect to the equivalent pin of DCM directly.
LOCKED
O
Same as
primitive
Connect to the equivalent pin of DCM directly.
PSDONE
O
Same as
primitive
Connect to the equivalent pin of DCM directly.
DCM Module Register Descriptions
Not Applicable.
DCM Module Interrupt Descriptions
Not Applicable.
Design Implementation
Design Tools
The DCM Module design is hand written.
To see the synthesis tool used for this device, go to Tools. The EDIF netlist output from XST is then
input to the Xilinx Alliance tool suite for actual device implementation.
Target Technology
The target technology is an FPGA listed in EDK Supported Device Families.
Device Utilization and Performance Benchmarks
The device utilization depends on DCM and BUFG primitive resources of the targeted device. See the
respective FPGA family user guide for details on DCM and BUFG primitive performance and available
resources.
Specification Exceptions
Not applicable.
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