XC9572XV_07 Datasheet, PDF (4/9 Pages) Xilinx, Inc – Optimized for high-performance 2.5V systems

XC9572XV High-performance CPLD
R
DC Characteristics (Over Recommended Operating Conditions)
Symbol
V_OH
V_OL
I_IL
Parameter
Output high voltage for 3.3V outputs
Output high voltage for 2.5V outputs
Output high voltage for 1.8V outputs
Output low voltage for 3.3V outputs
Output low voltage for 2.5V outputs
Output low voltage for 1.8V outputs
Input leakage current
I_IH
Input high-Z leakage current
C_IN
I/O capacitance
I_CC
Operating Supply Current
(low power mode, active)
Test Conditions
I_OH = –4.0 mA
I_OH = –1.0 mA
I_OH = –100 μA
I_OL = 8.0 mA
I_OL = 1.0 mA
I_OL = 100 μA
V_CC = 2.62V
V_CCIO = 3.6V
V_IN = GND or 3.6V
V_CC = 2.62V
V_CCIO = 3.6V
V_IN = GND or 3.6V
V_CC min < V_IN < 3.6V
V_IN = GND
f = 1.0 MHz
V_I = GND, No load
f = 1.0 MHz
AC Characteristics
Symbol
T_PD
T_SU
T_H
T_CO
f_SYSTEM
T_PSU
T_PH
T_PCO
T_OE
T_OD
T_POE
T_POD
T_AO
T_PAO
T_WLH
T_PLH
T_APRPW
Parameter
I/O to output valid
I/O setup time before GCK
I/O hold time after GCK
GCK to output valid
Multiple FB internal operating frequency
I/O setup time before p-term clock input
I/O hold time after p-term clock input
P-term clock output valid
GTS to output valid
GTS to output disable
Product term OE to output enabled
Product term OE to output disabled
GSR to output valid
P-term S/R to output valid
GCK pulse width (High or Low)
P-term clock pulse width (High or Low)
Asynchronous preset/reset pulse width (High or Low)
XC9572XV-5
Min
Max
-
5.0
3.5
-
0
-
-
3.5
-
222.2
1.0
-
2.5
-
-
6.0
-
4.0
-
4.0
-
7.0
-
7.0
-
10.0
-
10.7
2.2
-
5.0
-
5.0
-
Min
2.4
2.0
90% V_CCIO
-
-
-
-
Max Units
-
V
-
V
-
V
0.4
V
0.4
V
0.4
V
±10 μA
-
±10 μA
-
±150 μA
-
10
pF
14
mA
XC9572XV-7
Min
Max
-
7.5
4.8
-
0
-
-
4.5
-
125.0
1.6
-
3.2
-
-
7.7
-
5.0
-
5.0
-
9.5
-
9.5
-
12.0
-
12.6
4.0
-
6.5
-
6.5
-
Units
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4
www.xilinx.com
DS052 (v3.0) June 25, 2007
Product Specification