XC95288XV Datasheet, PDF (2/12 Pages) Xilinx, Inc – 144-pin TQFP (117 user I/O pins)

XC95288XV High-Performance CPLD
JTAG Port
3
1
JTAG
Controller
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
3
I/O/GCK
1
I/O/GSR
4
I/O/GTS
I/O
Blocks
R
In-System Programming Controller
54
18
54
18
54
18
54
18
Function
Block 1
Macrocells
1 to 18
Function
Block 2
Macrocells
1 to 18
Function
Block 3
Macrocells
1 to 18
Function
Block 4
Macrocells
1 to 18
54
18
Function
Block 16
Macrocells
1 to 18
DS055_02_101300
Figure 2: XC95288XV Architecture
(Function Block outputs (indicated by the bold line) drive the I/O Blocks directly.)
2
www.xilinx.com
DS050 (v2.2) August 27, 2001
1-800-255-7778
Advance Product Specification