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XCF01S_07 Datasheet, PDF (1/46 Pages) Xilinx, Inc – Platform Flash In-System Programmable
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Platform Flash In-System Programmable
Configuration PROMs
DS123 (v2.11.1) March 30, 2007 0
Features
• In-System Programmable PROMs for Configuration of
Xilinx FPGAs
• Low-Power Advanced CMOS NOR FLASH Process
• Endurance of 20,000 Program/Erase Cycles
• Operation over Full Industrial Temperature Range
(–40°C to +85°C)
• IEEE Standard 1149.1/1532 Boundary-Scan (JTAG)
Support for Programming, Prototyping, and Testing
• JTAG Command Initiation of Standard FPGA
Configuration
• Cascadable for Storing Longer or Multiple Bitstreams
• Dedicated Boundary-Scan (JTAG) I/O Power Supply
(VCCJ)
• I/O Pins Compatible with Voltage Levels Ranging From
1.5V to 3.3V
• Design Support Using the Xilinx Alliance ISE™ and
Foundation ISE Series Software Packages
Product Specification
• XCF01S/XCF02S/XCF04S
♦ 3.3V supply voltage
♦ Serial FPGA configuration interface (up to 33 MHz)
♦ Available in small-footprint VO20 and VOG20
packages.
• XCF08P/XCF16P/XCF32P
♦ 1.8V supply voltage
♦ Serial or parallel FPGA configuration interface
(up to 33 MHz)
♦ Available in small-footprint VO48, VOG48, FS48,
and FSG48 packages
♦ Design revision technology enables storing and
accessing multiple design revisions for
configuration
♦ Built-in data decompressor compatible with Xilinx
advanced compression technology
Description
Xilinx introduces the Platform Flash series of in-system
programmable configuration PROMs. Available in 1 to 32
Megabit (Mbit) densities, these PROMs provide an
easy-to-use, cost-effective, and reprogrammable method
for storing large Xilinx FPGA configuration bitstreams. The
Platform Flash PROM series includes both the 3.3V
XCFxxS PROM and the 1.8V XCFxxP PROM. The XCFxxS
version includes 4-Mbit, 2-Mbit, and 1-Mbit PROMs that
support Master Serial and Slave Serial FPGA configuration
modes (Figure 1, page 2). The XCFxxP version includes
32-Mbit, 16-Mbit, and 8-Mbit PROMs that support Master
Serial, Slave Serial, Master SelectMAP, and Slave
SelectMAP FPGA configuration modes (Figure 2, page 2).
A summary of the Platform Flash PROM family members
and supported features is shown in Table 1.
Table 1: Platform Flash PROM Features
Device Density VCCINT VCCO Range VCCJ Range
Packages
XCF01S
XCF02S
XCF04S
XCF08P
1 Mbit
2 Mbit
4 Mbit
8 Mbit
XCF16P 16 Mbit
XCF32P 32 Mbit
3.3V
3.3V
3.3V
1.8V
1.8V
1.8V
1.8V – 3.3V 2.5V – 3.3V
1.8V – 3.3V 2.5V – 3.3V
1.8V – 3.3V 2.5V – 3.3V
1.5V – 3.3V 2.5V – 3.3V
1.5V – 3.3V 2.5V – 3.3V
1.5V – 3.3V 2.5V – 3.3V
VO20/VOG20
VO20/VOG20
VO20/VOG20
VO48/VOG48
FS48/FSG48
VO48/VOG48
FS48/FSG48
VO48/VOG48
FS48/FSG48
Program
In-system
via JTAG
✓
✓
✓
Serial
Config.
Parallel
Config.
Design
Revisioning
Compression
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
© 2003–2007 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
PowerPC is a trademark of IBM, Inc. All other trademarks are the property of their respective owners. All specifications are subject to change without notice.
DS123 (v2.11.1) March 30, 2007
www.xilinx.com
Product Specification
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