XC95288 Datasheet, PDF (1/11 Pages) Xilinx, Inc – 288 macrocells with 6,400 usable gates

0
®
XC95288 In-System Programmable
CPLD
September 15, 1999 (Version 4.0)
0 5* Product Specification
Features
• 10 ns pin-to-pin logic delays on all pins
• f_CNT to 95 MHz
• 288 macrocells with 6,400 usable gates
• Up to 192 user I/O pins
• 5 V in-system programmable
- Endurance of 10,000 program/erase cycles
- Program/erase over full commercial voltage and
temperature range
• Enhanced pin-locking architecture
• Flexible 36V18 Function Block
- 90 product terms drive any or all of 18 macrocells
within Function Block
- Global and product term clocks, output enables, set
and reset signals
• Extensive IEEE Std 1149.1 boundary-scan (JTAG)
support
• Programmable power reduction mode in each
macrocell
• Slew rate control on individual outputs
• User programmable ground pin capability
• Extended pattern security features for design protection
• High-drive 24 mA outputs
• 3.3 V or 5 V I/O capability
• Advanced CMOS 5V FastFLASH technology
• Supports parallel programming of more than one
XC9500 concurrently
• Available in 352-pin BGA and 208-pin HQFP packages
Description
The XC95288 is a high-performance CPLD providing
advanced in-system programming and test capabilities for
general purpose logic integration. It is comprised of sixteen
36V18 Function Blocks, providing 6,400 usable gates with
propagation delays of 10 ns. See Figure 2 for the architec-
ture overview.
Power Management
Power dissipation can be reduced in the XC95288 by con-
figuring macrocells to standard or low-power modes of
operation. Unused macrocells are turned off to minimize
power dissipation.
Operating current for each design can be approximated for
specific operating conditions using the following equation:
I_CC (mA) =
MC_HP (1.7) + MC_LP (0.9) + MC (0.006 mA/MHz) f
Where:
MC_HP = Macrocells in high-performance mode
MC_LP = Macrocells in low-power mode
MC = Total number of macrocells used
f = Clock frequency (MHz)
Figure 1 shows a typical calculation for the XC95288
device.
900
600
(500)
300
High ^Performance
Low ^Power
(700)
(500)
0
50
100
Clock Frequency (MHz)
X7131
Figure 1: Typical I_CC vs. Frequency For XC95288
September 15, 1999 (Version 4.0)
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