DS590 Datasheet, PDF (1/4 Pages) Xilinx, Inc – LogiCORE IP Virtex-5 FPGA RocketIO GTP Transceiver

DS590 April 19, 2010
LogiCORE IP Virtex-5 FPGA
RocketIO GTP Transceiver
Wizard v2.1
Product Specification
Introduction
The LogiCORE™ IP Virtex^®-5 FPGA RocketIO™ GTP
Transceiver Wizard automates the task of creating HDL
wrappers⁽¹⁾ to configure the high-speed serial GTP
transceivers in the Virtex^®-5 LXT and SXT sub-families.
The menu-driven interface allows one or more GTP
transceivers to be configured using pre-defined tem-
plates for popular industry standards, or from scratch,
to support a wide variety of custom protocols. The
Wizard produces a wrapper, an example design, and a
test bench for rapid integration and verification of the
serial interface with your custom function.
Features
• Creates customized HDL wrappers to configure
Virtex-5 FPGA RocketIO GTP transceivers
• Users can configure Virtex-5 family GTP
transceivers to conform to industry standard
protocols using predefined templates, or tailor the
templates for custom protocols
• Included protocol templates provide support for
the following specifications: Aurora 8B/10B,
CPRI™, Fibre Channel 1x, Gigabit Ethernet,
HD-SDI, OBSAI, OC3, OC12, OC48, PCI Express^®
(PCIe^®) generation1, SATA 1.5 Gbps, SATA
3 Gbps, Serial RapidIO, and XAUI
• Automatically configures analog settings
• Each custom wrapper includes example design,
test bench; and both implementation and
simulation scripts
LogiCORE IP Facts
Core Specifics
Supported Device
Family
Virtex-5 LXT/SXT ⁽¹⁾
Provided with Core
Documentation
Design File Formats
Constraints File
Verification
Product Specification
Getting Started Guide
Verilog and VHDL
.ucf (user constraints file)
Example Design and Test Bench
Instantiation Template
Verilog or VHDL Wrapper
Design Tool Requirements
Xilinx Implementation
Tools
Verification
Simulation
Synthesis
ISE^® 12.1 ⁽²⁾
Mentor Graphics ModelSim^® 6.5c
and above
ISim 12.1
Mentor Graphics ModelSim 6.5c
and above
XST12.1
Synplicity Synplify Pro D-2009.12
Support
Provided by Xilinx, Inc. at http://www.xilinx.com/support
1. For more information on the Virtex-5 devices,
see the Virtex-5 Family Overview [Ref 1]
2. ISE Service Packs can be downloaded
from http://www.xilinx.com/support/download.htm
1. See the LogiCORE IP Virtex-5 FPGA RocketIO GTP Transceiver Wizard Getting Started Guide [Ref 2] for an overview of the procedure to create a
wrapper.
© 2007-2010 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE and other designated brands included herein are trademarks of Xilinx in the United States and
other countries. CPRI is a trademark of Siemens AG. PCI, PCI-SIG, PCI EXPRESS, PCIE, PCI-X, PCI HOT PLUG, MINI PCI, EXPRESSMODULE, and the PCI,
PCI-X, PCI HOT PLUG, and MINI PC design marks are trademarks, registered trademarks, and/or service marks of PCI-SIG. All other trademarks are the property
of their respective owners.
DS590 April 19, 2010
www.xilinx.com
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Product Specification