DS323 Datasheet, PDF (1/9 Pages) Xilinx, Inc – LogiCORE IP Ethernet Statistics v3.5

DS323 March 1, 2011
LogiCORE IP Ethernet Statistics
v3.5
Product Specification
Introduction
The LogiCORE™ IP Ethernet Statistics core provides a
user-configurable collection of statistical counters that
can be used to gather network traffic statistics for the
Xilinx® Ethernet Media Access Controller (MAC)
products.
Features
• Example designs are provided for use with these
Xilinx Ethernet MAC cores:
• Embedded Tri-Mode Ethernet MAC
• Tri-Mode Ethernet MAC solution comprised of
the 10/100/1000 Mb/s, 1000 Mb/s, and
10/100 Mb/s IP cores
• Provides between 20 and 64 individual statistics
counters
• Provides 32-bit or 64-bit counter widths
• Addressable counters that can be read through an
independent microprocessor-neutral interface
(which can be shared with the chosen Ethernet
MAC)
• Editable HDL example design included to define
the statistics counted
• Fully configurable using the Xilinx CORE
Generator™ software v13.1.
LogiCORE IP Facts
Core Specifics
Supported Device
Families¹
Supported User
Interfaces
Width
Performance
Virtex-6, Virtex-5, Virtex-4,
Spartan-6, Spartan-3, Spartan-3A,
Spartan-3A DSP Spartan-3E
Host Interface
32-bit or 64-bit counters
Statistical gathering at
10 Mb/s, 100 Mb/s, 1 Gb/s
Resources
Slices LUTs
FFs
Block
RAM
LUT4 (Spartan-3,
Virtex-4)²
450-850 300-700 500-800 1-2
LUT6 (Virtex-5 and
newer)²
300-550 450-850 450-750 0
BUFG (All families)
2-4 (shared with Ethernet MAC)
Provided with Core
Documentation
Product Specification
User Guide
Design Files
NGC netlist
Example Design
Verilog or VHDL
Test Bench
Demonstration Test Bench Scripts
Constraints File
User Constraints File (UCF)
Simulation Model
Verilog or VHDL
Tested Design Tools
Design Entry Tools
ISE v13.1 software
Simulation
Mentor Graphics ModelSim v6.6d
Cadence Incisive Enterprise Simulator
(IES) v10.2
Synopsys VCS and VCS MX 2010.06
Synthesis Tools
XST v13.1
Provided by Xilinx, Inc.
1. For the complete list of supported devices, see the release notes for
this core. Speed grades for devices are: -1 for Virtex-6 and Virtex-5,
-10 for Virtex-4, -2 for Spartan-6, and -4 for all other supported
Spartan devices. Ethernet Statistics has been merged into the
Tri-Mode Ethernet MAC for v5.1 and later and the Virtex-6 FPGA
Tri-Mode Ethernet MAC for v2.1 and later. When using these
versions of the Tri-Mode Ethernet MAC, you do not instantiate the
Ethernet Statistics separately.
2. The Ethernet Statistics core is highly configurable; resource ranges
given are given as a guide.
© Copyright 2010-2011. Xilinx, Inc. XILINX, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, and other designated brands included herein are trademarks of Xilinx
in the United States and other countries. The PowerPC name and logo are registered trademarks of IBM Corp. and used under license. All other trademarks are the
property of their respective owners.
DS323 March 1, 2011
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Product Specification