DS289 Datasheet, PDF (1/4 Pages) Xilinx, Inc – JTAGPPC Controller

JTAGPPC Controller (v2.01c)
DS298 April 24, 2009
Product Specification
Introduction
The JTAGPPC Controller is a wrapper for the JTAGPPC
and JTAGPPC440 FPGA primitives. The JTAGPPC and
JTAGPPC440 primitives allow the PowerPC® 405 pro-
cessor and the PowerPC 440 processor, respectively, to
connect to the JTAG chain of the FPGA. For more infor-
mation about connecting the PPC405 processor to the
FPGA JTAG chain, refer to the JTAG Debug Port section
of the PowerPC 405 Processor Block Reference Guide. For
more information about connecting the PowerPC 440
processor to the FPGA JTAG chain, refer to the JTAG
Interface section of UG200, Embedded Processor Block in
Virtex®-5 FPGAs Reference Guide.
Features
• Wrapper for the JTAGPPC and JTAGPC440
primitives
• Enables the debug port of the PowerPC to be
connected to the FPGA JTAG chain
• Can connect up to two PowerPC primitives
• Automatically instantiates and connects second
unused PowerPC processor in any dual-PowerPC
device
LogiCORE™ Facts
Core Specifics
Supported Device
Family
See EDK Supported Device
Families.
Version of Core
jtagppc_cntlr
v2.01c
Resources Used
Min
Max
Slices
N/A
N/A
LUTs
0
1
FFs
0
0
Block RAMs
0
0
Special Features
In Virtex-4: JTAGPPC
In Virtex-5: JTAGPPC440
Provided with Core
Documentation
Product Specification
Design File Formats
VHDL
Constraints File
N/A
Verification
N/A
Instantiation Template
N/A
Reference Designs
None
Design Tool Requirements
Xilinx Implementation
Tools
Verification
Simulation
See Tools for requirements.
Synthesis
Support
Provided by Xilinx, Inc.
© 2008-2009 Xilinx, Inc., XILINX, the Xilinx logo, Virtex, Spartan, ISE and other designated brands included herein are trademarks of Xilinx in the United States and
other countries. PowerPC is a trademark of IBM Corp. and used under license. All other trademarks are the property of their respective owners.
DS298 April 24, 2009
www.xilinx.com
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Product Specification