English
Language : 

DS284 Datasheet, PDF (1/12 Pages) Xilinx, Inc – LogiCORE IP ChipScope Pro
DS284 June 22, 2011
LogiCORE IP ChipScope Pro
Virtual Input/Output (VIO) (1.04a)
Product Specification
Introduction
The LogiCORE™ IP ChipScope™ Pro Virtual
Input/Output (VIO) core is a customizable core that
can both monitor and drive internal FPGA signals in
real time. Two different kinds of inputs and two
different kinds of outputs are available, both of which
are customizable in size to interface with the FPGA
design.
Features
• Provides virtual LEDs and other status indicators
through asynchronous and synchronous input
ports
• Has activity detectors on input ports to detect
rising and falling transitions between samples
• Provides virtual buttons and other controls
through asynchronous and synchronous output
ports
• For synchronous outputs, provides ability to
define a pulse train, which is a 16-cycle train of
ones and zeros that run at design speed.
LogiCORE IP Facts Table
Core Specifics
Supported Device
Family (1)
Kintex®-7(3), Virtex®-7, Virtex-6, Virtex-5,
Virtex-4, Spartan®-6, Spartan-3/XA,
Spartan-3E/XA, Spartan-3A/3AN/3A DSP/XA
Supported User
Interfaces
Not applicable.
Provided with Core
Resources
Frequency
Configuration (4)
LUTs
FFs
DSP
Slices
Block
RAMs
Max
Freq
Config1
60 87
0
0
399.808
MHz
Config2
131 291 0
0
399.808
MHz
Config3
227 543 0
0
399.808
MHz
Documentation
Product Specification
User Guide
Design Files
Netlist
Example Design
Verilog /VHDL
Test Bench
Not Provided
Constraints File
Xilinx Constraints File
Simulation Model
Not Provided
Tested Design Tools (2)
Design Entry Tools
CORE Generator tool, XPS
Simulation
Not Provided
Synthesis Tools
Not Provided.
Support
Provided by Xilinx, Inc.
Notes:
1. For a complete listing of supported derivative devices, see the
IDS Embedded Edition Derivative Device Support.
2. For a listing of the supported tool versions, see the ISE Design
Suite 13: Release Note Guide.
3. For more information, see DS180 7 Series FPGAs.
4. Overview.For configuration details, see Table 6, page 11.
© Copyright 2008-2009, 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE and other designated brands included herein are trademarks of Xilinx in the
United States and other countries. All other trademarks are the property of their respective owners.
DS284 June 22, 2011
www.xilinx.com
1
Product Specification