X1228 Datasheet, PDF (7/31 Pages) Xicor Inc. – Real Time Clock/Calendar/CPU Supervisor with EEPROM

X1228
Write Cycle Timing
SCL
SDA
8th Bit of Last Byte
ACK
t_WC
Stop
Condition
Start
Condition
Power Up Timing
Symbol
Parameter
Min.
Typ.⁽²⁾
Max.
Units
t_PUR⁽¹⁾
t_PUW⁽¹⁾
Time from Power Up to Read
Time from Power Up to Write
1
ms
5
ms
Notes: (1) Delays are measured from the time V_CC is stable until the specified operation can be initiated. These parameters are not 100%
tested. V_CC slew rate should be between 0.2mV/µsec and 50mV/µsec.
(2) Typical values are for T_A = 25°C and V_CC = 5.0V
Nonvolatile Write Cycle Timing
Symbol
Parameter
Min.
Typ.⁽¹⁾
Max.
Units
t_WC⁽¹⁾
Write Cycle Time
5
10
ms
Note: (1) t_WC is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle.
It is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
WATCHDOG TIMER/LOW VOLTAGE RESET OPERATING CHARACTERISTICS
Watchdog/Low Voltage Reset Parameters (SeeFigures 3 and 4)
Symbols
V_PTRIP
t_RPD
t_PURST
Parameters
Programmed Reset Trip Voltage
X1228-4.5A
X1228
X1228-2.7A
X1228-2.7
V_CC Detect to RESET LOW
Power Up Reset Time-out Delay
Min.
4.50
4.25
2.75
2.55
Typ.
4.63
4.38
2.85
2.65
100
250
t_F
V_CC Fall Time
10
t_R
V_CC Rise Time
10
t_WDO
Watchdog Timer Period (Crystal=32.768kHz):
WD1=0, WD0=0
WD1=0, WD0=1
WD1=1, WD0=0
1.7
1.75
725
750
225
250
t_RST
Watchdog Reset Time-out Delay (Crystal=32.768kHz)
225
250
t_RSP
2-Wire interface
1
V_RVALID
Reset Valid V_CC
1.0
Max.
4.75
4.50
2.95
2.75
500
400
1.8
775
275
275
Unit
V
ns
ms
µs
µs
s
ms
ms
ms
µs
V
REV 1.3 3/24/04
www.xicor.com
Characteristics subject to change without notice. 7 of 31