X24C44 Datasheet, PDF (2/15 Pages) Xicor Inc. – Serial Nonvolatile Static RAM

X24C44
PIN DESCRIPTIONS
Chip Enable (CE)
The Chip Enable input must be HIGH to enable all read/
write operations. CE must remain HIGH following a
Read or Write command until the data transfer is com-
plete. CE LOW places the X24C44 in the low power
standby mode and resets the instruction register. There-
fore, CE must be brought LOW after the completion of an
operation in order to reset the instruction register in
preparation for the next command.
Serial Clock (SK)
The Serial Clock input is used to clock all data into and
out of the device.
Data In (DI)
Data In is the serial data input.
Data Out (DO)
Data Out is the serial data output. It is in the high
impedance state except during data output cycles in
response to a READ instruction.
STORE
STORE LOW will initiate an internal transfer of data from
RAM to the E²PROM array.
RECALL
RECALL LOW will initiate an internal transfer of data
from E²PROM to the RAM array.
PIN CONFIGURATION
PDIP/CERDIP/SOIC
CE 1
8
VCC
SK 2
7 STORE
X24C44
DI 3
6 RECALL
DO 4
5
VSS
3832 FHD F02.2
PIN NAMES
Symbol
CE
SK
DI
DO
RECALL
STORE
V_CC
V_SS
Description
Chip Enable
Serial Clock
Serial Data In
Serial Data Out
Recall Input
Store Input
+5V
Ground
3832 PGM T01
2